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ti814x_evm: enable CPSW support

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Adds CPSW support to the TI814X EVM configured with
an ET1011C PHY in GMII mode.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
This commit is contained in:
Matt Porter 2013-03-20 05:38:14 +00:00 committed by Tom Rini
parent f485c8a35b
commit cd87464d08
4 changed files with 129 additions and 0 deletions
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72
board/ti/ti814x/evm.c
View file

@ -17,6 +17,7 @@
*/
#include <common.h>
#include <cpsw.h>
#include <errno.h>
#include <spl.h>
#include <asm/arch/cpu.h>
@ -39,6 +40,8 @@ static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
#endif
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
/* UART Defines */
#ifdef CONFIG_SPL_BUILD
#define UART_RESET (0x1 << 1)
@ -166,6 +169,9 @@ void s_init(void)
/* Set MMC pins */
enable_mmc1_pin_mux();
/* Set Ethernet pins */
enable_enet_pin_mux();
/* Enable UART */
uart_enable();
@ -199,3 +205,69 @@ int board_mmc_init(bd_t *bis)
return 0;
}
#endif
#ifdef CONFIG_DRIVER_TI_CPSW
static void cpsw_control(int enabled)
{
/* VTP can be added here */
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x50,
.sliver_reg_ofs = 0x700,
.phy_id = 1,
},
{
.slave_reg_ofs = 0x90,
.sliver_reg_ofs = 0x740,
.phy_id = 0,
},
};
static struct cpsw_platform_data cpsw_data = {
.mdio_base = CPSW_MDIO_BASE,
.cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x100,
.slaves = 1,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0x600,
.ale_entries = 1024,
.host_port_reg_ofs = 0x28,
.hw_stats_reg_ofs = 0x400,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_1,
};
#endif
int board_eth_init(bd_t *bis)
{
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
mac_addr[0] = mac_hi & 0xFF;
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ether_addr(mac_addr))
eth_setenv_enetaddr("ethaddr", mac_addr);
else
printf("Unable to read MAC address. Set <ethaddr>\n");
}
return cpsw_register(&cpsw_data);
}

1
board/ti/ti814x/evm.h
View file

@ -3,5 +3,6 @@
void enable_uart0_pin_mux(void);
void enable_mmc1_pin_mux(void);
void enable_enet_pin_mux(void);
#endif /* _EVM_H */

35
board/ti/ti814x/mux.c
View file

@ -40,6 +40,36 @@ static struct module_pin_mux mmc1_pin_mux[] = {
{-1},
};
static struct module_pin_mux enet_pin_mux[] = {
{OFFSET(pincntl232), MODE(0x01)}, /* EMAC_RMREFCLK */
{OFFSET(pincntl233), PULLUP_EN | MODE(0x01)}, /* MDCLK */
{OFFSET(pincntl234), PULLUP_EN | MODE(0x01)}, /* MDIO */
{OFFSET(pincntl235), MODE(0x01)}, /* EMAC[0]_MTCLK */
{OFFSET(pincntl236), MODE(0x01)}, /* EMAC[0]_MCOL */
{OFFSET(pincntl237), MODE(0x01)}, /* EMAC[0]_MCRS */
{OFFSET(pincntl238), MODE(0x01)}, /* EMAC[0]_MRXER */
{OFFSET(pincntl239), MODE(0x01)}, /* EMAC[0]_MRCLK */
{OFFSET(pincntl240), MODE(0x01)}, /* EMAC[0]_MRXD[0] */
{OFFSET(pincntl241), MODE(0x01)}, /* EMAC[0]_MRXD[1] */
{OFFSET(pincntl242), MODE(0x01)}, /* EMAC[0]_MRXD[2] */
{OFFSET(pincntl243), MODE(0x01)}, /* EMAC[0]_MRXD[3] */
{OFFSET(pincntl244), MODE(0x01)}, /* EMAC[0]_MRXD[4] */
{OFFSET(pincntl245), MODE(0x01)}, /* EMAC[0]_MRXD[5] */
{OFFSET(pincntl246), MODE(0x01)}, /* EMAC[0]_MRXD[6] */
{OFFSET(pincntl247), MODE(0x01)}, /* EMAC[0]_MRXD[7] */
{OFFSET(pincntl248), MODE(0x01)}, /* EMAC[0]_MRXDV */
{OFFSET(pincntl249), MODE(0x01)}, /* EMAC[0]_GMTCLK */
{OFFSET(pincntl250), MODE(0x01)}, /* EMAC[0]_MTXD[0] */
{OFFSET(pincntl251), MODE(0x01)}, /* EMAC[0]_MTXD[1] */
{OFFSET(pincntl252), MODE(0x01)}, /* EMAC[0]_MTXD[2] */
{OFFSET(pincntl253), MODE(0x01)}, /* EMAC[0]_MTXD[3] */
{OFFSET(pincntl254), MODE(0x01)}, /* EMAC[0]_MTXD[4] */
{OFFSET(pincntl255), MODE(0x01)}, /* EMAC[0]_MTXD[5] */
{OFFSET(pincntl256), MODE(0x01)}, /* EMAC[0]_MTXD[6] */
{OFFSET(pincntl257), MODE(0x01)}, /* EMAC[0]_MTXD[7] */
{OFFSET(pincntl258), MODE(0x01)}, /* EMAC[0]_MTXEN */
};
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
@ -49,3 +79,8 @@ void enable_mmc1_pin_mux(void)
{
configure_module_pin_mux(mmc1_pin_mux);
}
void enable_enet_pin_mux(void)
{
configure_module_pin_mux(enet_pin_mux);
}

21
include/configs/ti814x_evm.h
View file

@ -218,4 +218,25 @@
/* Unsupported features */
#undef CONFIG_USE_IRQ
/* Ethernet */
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 1
#define CONFIG_PHY_ET1011C
#define CONFIG_PHY_ET1011C_TX_CLK_FIX
#endif /* ! __CONFIG_TI814X_EVM_H */