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https://github.com/AsahiLinux/u-boot
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AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master
Rework for AT91SAM9263-EK, makes it build again. Based on the work for AT91SAM9260-EK. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
This commit is contained in:
Xu, Hong
U-Boot
parent
ffa280fa53
commit
cd46b0f2b9
6 changed files with 99 additions and 90 deletions
19
Makefile
19
Makefile
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@ -802,25 +802,6 @@ M5485HFE_config : unconfig
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## ARM926EJ-S Systems
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#########################################################################
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at91sam9263ek_norflash_config \
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at91sam9263ek_norflash_boot_config \
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at91sam9263ek_nandflash_config \
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at91sam9263ek_dataflash_config \
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at91sam9263ek_dataflash_cs0_config \
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at91sam9263ek_config : unconfig
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@mkdir -p $(obj)include
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@if [ "$(findstring _nandflash,$@)" ] ; then \
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echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
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elif [ "$(findstring norflash,$@)" ] ; then \
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echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \
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else \
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echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
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fi;
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@if [ "$(findstring norflash_boot,$@)" ] ; then \
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echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \
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fi;
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@$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
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at91sam9m10g45ek_nandflash_config \
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at91sam9m10g45ek_dataflash_config \
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at91sam9m10g45ek_dataflash_cs0_config \
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@ -32,7 +32,8 @@
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#include <asm/arch/at91_matrix.h>
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#include <asm/arch/at91_pio.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/io.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/hardware.h>
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#include <lcd.h>
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#include <atmel_lcdc.h>
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@ -52,9 +53,9 @@ DECLARE_GLOBAL_DATA_PTR;
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static void at91sam9263ek_nand_hw_init(void)
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{
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unsigned long csa;
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at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE;
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at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
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at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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/* Enable CS3 */
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csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
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@ -83,14 +84,14 @@ static void at91sam9263ek_nand_hw_init(void)
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AT91_SMC_MODE_TDF_CYCLE(2),
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&smc->cs[3].mode);
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writel(1 << AT91SAM9263_ID_PIOA | 1 << AT91SAM9263_ID_PIOCDE,
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writel(1 << ATMEL_ID_PIOA | 1 << ATMEL_ID_PIOCDE,
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&pmc->pcer);
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/* Configure RDY/BSY */
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at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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/* Enable NandFlash */
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at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#endif
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@ -98,11 +99,11 @@ static void at91sam9263ek_nand_hw_init(void)
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static void at91sam9263ek_macb_hw_init(void)
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{
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unsigned long erstl;
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
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at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIO;
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at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
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/* Enable clock */
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writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
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writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
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/*
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* Disable pull-up on:
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@ -153,7 +154,7 @@ vidinfo_t panel_info = {
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vl_vsync_len: 1,
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vl_upper_margin:1,
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vl_lower_margin:0,
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mmio: AT91SAM9263_LCDC_BASE,
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mmio: ATMEL_BASE_LCDC,
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};
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void lcd_enable(void)
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@ -168,7 +169,7 @@ void lcd_disable(void)
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static void at91sam9263ek_lcd_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
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at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
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@ -193,8 +194,8 @@ static void at91sam9263ek_lcd_hw_init(void)
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at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
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at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
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writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer);
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gd->fb_base = AT91SAM9263_SRAM0_BASE;
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writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
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gd->fb_base = ATMEL_BASE_SRAM0;
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}
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#ifdef CONFIG_LCD_INFO
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@ -218,7 +219,7 @@ void lcd_show_board_info(void)
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lcd_printf ("(C) 2008 ATMEL Corp\n");
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lcd_printf ("at91support@atmel.com\n");
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lcd_printf ("%s CPU at %s MHz\n",
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CONFIG_SYS_AT91_CPU_NAME,
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ATMEL_CPU_NAME,
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strmhz(temp, get_cpu_clk_rate()));
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dram_size = 0;
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@ -244,6 +245,18 @@ void lcd_show_board_info(void)
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#endif /* CONFIG_LCD_INFO */
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#endif
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int board_early_init_f(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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/* Enable clocks for all PIOs */
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writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
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(1 << ATMEL_ID_PIOCDE),
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&pmc->pcer);
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return 0;
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}
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int board_init(void)
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{
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/* Enable Ctrlc */
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@ -252,9 +265,9 @@ int board_init(void)
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/* arch number of AT91SAM9263EK-Board */
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gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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at91_serial_hw_init();
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at91_seriald_hw_init();
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#ifdef CONFIG_CMD_NAND
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at91sam9263ek_nand_hw_init();
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#endif
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@ -276,8 +289,9 @@ int board_init(void)
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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@ -291,7 +305,7 @@ int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *) AT91_EMAC_BASE, 0x00);
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rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x00);
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#endif
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return rc;
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}
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x23f00000
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@ -23,25 +23,24 @@
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_pio.h>
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#include <asm/io.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/io.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91sam9263.h>
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void coloured_LED_init(void)
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{
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/* Enable clock */
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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writel(1 << AT91SAM9263_ID_PIOB | 1 << AT91SAM9263_ID_PIOCDE,
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writel(1 << ATMEL_ID_PIOB | 1 << ATMEL_ID_PIOCDE,
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&pmc->pcer);
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at91_set_pio_output(CONFIG_RED_LED, 1);
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at91_set_pio_output(CONFIG_GREEN_LED, 1);
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at91_set_pio_output(CONFIG_YELLOW_LED, 1);
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at91_set_gpio_output(CONFIG_RED_LED, 1);
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at91_set_gpio_output(CONFIG_GREEN_LED, 1);
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at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
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at91_set_pio_value(CONFIG_RED_LED, 0);
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at91_set_pio_value(CONFIG_GREEN_LED, 1);
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at91_set_pio_value(CONFIG_YELLOW_LED, 1);
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at91_set_gpio_value(CONFIG_RED_LED, 0);
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at91_set_gpio_value(CONFIG_GREEN_LED, 1);
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at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
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}
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@ -80,6 +80,11 @@ at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel
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at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH
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at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0
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at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3
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at91sam9263ek_nandflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_NANDFLASH
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at91sam9263ek_dataflash_cs0 arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH
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at91sam9263ek_dataflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH
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at91sam9263ek_norflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_NORFLASH
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at91sam9263ek_norflash_boot arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_BOOT_NORFLASH
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at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH
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at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0
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at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3
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@ -27,13 +27,21 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
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#define CONFIG_SYS_HZ 1000
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/*
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* SoC must be defined first, before hardware.h is included.
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* In this case SoC is defined in boards.cfg.
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*/
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#include <asm/hardware.h>
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#define CONFIG_SYS_TEXT_BASE 0x21F00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_AT91SAM9263EK 1 /* It's an AT91SAM9263EK Board */
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
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#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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@ -43,17 +51,27 @@
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#ifndef CONFIG_SYS_USE_BOOT_NORFLASH
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#else
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#define CONFIG_SYS_USE_NORFLASH
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#endif
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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/*
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* Hardware drivers
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*/
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#define CONFIG_AT91_GPIO 1
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#define CONFIG_ATMEL_USART 1
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#undef CONFIG_USART2
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#define CONFIG_USART3 1 /* USART 3 is DBGU */
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#define CONFIG_ATMEL_LEGACY
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#define CONFIG_AT91_GPIO 1
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#define CONFIG_AT91_GPIO_PULLUP 1
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
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/* LCD */
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#define CONFIG_LCD 1
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@ -62,16 +80,16 @@
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO 1
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#define CONFIG_LCD_INFO_BELOW_LOGO 1
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#define CONFIG_SYS_WHITE_ON_BLACK 1
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#define CONFIG_SYS_WHITE_ON_BLACK 1
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#define CONFIG_ATMEL_LCD 1
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#define CONFIG_ATMEL_LCD_BGR555 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/* LED */
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#define CONFIG_AT91_LED
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#define CONFIG_RED_LED AT91_PIO_PORTB, 7 /* the power led */
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#define CONFIG_GREEN_LED AT91_PIO_PORTB, 8 /* the user1 led */
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#define CONFIG_YELLOW_LED AT91_PIO_PORTC, 29 /* the user2 led */
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#define CONFIG_RED_LED AT91_PIN_PB7 /* the power led */
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#define CONFIG_GREEN_LED AT91_PIN_PB8 /* the user1 led */
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#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* the user2 led */
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#define CONFIG_BOOTDELAY 3
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@ -101,8 +119,11 @@
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE 0x04000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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/* DataFlash */
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#define CONFIG_ATMEL_DATAFLASH_SPI
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@ -254,19 +275,14 @@
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8 1
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
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/*
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
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*/
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
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#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
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#endif
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@ -291,7 +307,7 @@
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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#ifdef CONFIG_SYS_USE_DATAFLASH
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@ -311,7 +327,7 @@
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#elif CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_IS_IN_NAND 1
|
||||
#define CONFIG_ENV_IS_IN_NAND 1
|
||||
#define CONFIG_ENV_OFFSET 0x60000
|
||||
#define CONFIG_ENV_OFFSET_REDUND 0x80000
|
||||
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
|
||||
|
|
@ -323,15 +339,12 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> "
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_LONGHELP 1
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
|
@ -339,12 +352,10 @@
|
|||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
|
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#error CONFIG_USE_IRQ not supported
|
||||
#endif
|
||||
#undef CONFIG_USE_IRQ
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue