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bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards
Introduce BSH SystemMaster (SMM) M2 board family, which consists of: imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards. Add support for imx6ulz BSH SMM M2 board: - 128 MiB DDR3 RAM - 256MiB Nand - USBOTG1 peripheral - fastboot. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
This commit is contained in:
Michael Trimarchi
Stefano Babic
parent
d072065690
commit
cc74cab86a
12 changed files with 626 additions and 0 deletions
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@ -895,6 +895,7 @@ dtb-$(CONFIG_MX6ULL) += \
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imx6ull-phytec-segin-ff-rdk-emmc.dtb \
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imx6ull-dart-6ul.dtb \
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imx6ull-somlabs-visionsom.dtb \
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imx6ulz-bsh-smm-m2.dtb \
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imx6ulz-14x14-evk.dtb
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dtb-$(CONFIG_ARCH_MX6) += \
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35
arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi
Normal file
35
arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi
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@ -0,0 +1,35 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 BSH Hausgeraete GmbH
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*
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* Author: Michael Trimarchi <michael@amarulasolutions.com>
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*/
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&{/soc} {
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u-boot,dm-pre-reloc;
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};
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&aips2 {
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u-boot,dm-pre-reloc;
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};
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&iomuxc {
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u-boot,dm-pre-reloc;
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};
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&iomuxc_snvs {
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u-boot,dm-pre-reloc;
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};
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&uart4 {
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u-boot,dm-pre-reloc;
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};
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&pinctrl_uart4 {
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u-boot,dm-pre-reloc;
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};
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&gpmi {
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u-boot,dm-spl;
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u-boot,dm-pre-reloc;
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};
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146
arch/arm/dts/imx6ulz-bsh-smm-m2.dts
Normal file
146
arch/arm/dts/imx6ulz-bsh-smm-m2.dts
Normal file
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@ -0,0 +1,146 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2021 BSH Hausgeraete GmbH
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "imx6ulz.dtsi"
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/ {
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model = "BSH SMM M2";
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compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull", "fsl,imx6ulz";
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chosen {
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stdout-path = &uart4;
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};
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usdhc2_pwrseq: usdhc2-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
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};
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};
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand>;
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nand-on-flash-bbt;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm4330-bt";
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max-speed = <3000000>;
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shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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};
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "peripheral";
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srp-disable;
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hnp-disable;
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adp-disable;
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status = "okay";
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};
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&usbphy1 {
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fsl,tx-d-cal = <106>;
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};
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&usdhc2 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wlan>;
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bus-width = <4>;
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no-1-8-v;
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non-removable;
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cap-power-off-card;
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keep-power-in-suspend;
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cap-sdio-irq;
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mmc-pwrseq = <&usdhc2_pwrseq>;
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status = "okay";
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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interrupt-parent = <&gpio1>;
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interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host-wake";
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};
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};
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&wdog1 {
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status = "okay";
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};
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&iomuxc {
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pinctrl_gpmi_nand: gpmi-nand {
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fsl,pins = <
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MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
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MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
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MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
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MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
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MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
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MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
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MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
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MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
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MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
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MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
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MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
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MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
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MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
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MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
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MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
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MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b099
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MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
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MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b099
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MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x79 /* BT_REG_ON */
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MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x100b1 /* BT_DEV_WAKE out */
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MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b0b0 /* BT_HOST_WAKE in */
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
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MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_wlan: wlangrp {
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fsl,pins = <
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MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
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MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10059
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MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
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MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
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MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
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MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
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MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x79 /* WL_REG_ON */
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MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x100b1 /* WL_DEV_WAKE - WiFi_GPIO_4 - WiFi FW UART */
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MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 /* WL_HOST_WAKE - WIFI_GPIO_0 - OOB IRQ */
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MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */
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>;
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};
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};
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@ -466,6 +466,17 @@ config TARGET_MX6ULL_14X14_EVK
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select DM_THERMAL
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imply CMD_DM
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config TARGET_MX6ULZ_SMM_M2
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bool "Support imx6ulz_smm_m2"
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depends on MX6ULL
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select DM
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select DM_GPIO
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select DM_I2C
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select DM_SERIAL
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select DM_MTD
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select DM_THERMAL
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select SUPPORT_SPL
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config TARGET_MYS_6ULX
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bool "MYiR MYS-6ULX"
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depends on MX6ULL
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@ -680,6 +691,7 @@ source "board/ge/b1x5v2/Kconfig"
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source "board/aristainetos/Kconfig"
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source "board/armadeus/opos6uldev/Kconfig"
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source "board/boundary/nitrogen6x/Kconfig"
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source "board/bsh/imx6ulz_smm_m2/Kconfig"
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source "board/bticino/mamoj/Kconfig"
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source "board/compulab/cm_fx6/Kconfig"
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source "board/dhelectronics/dh_imx6/Kconfig"
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12
board/bsh/imx6ulz_smm_m2/Kconfig
Normal file
12
board/bsh/imx6ulz_smm_m2/Kconfig
Normal file
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@ -0,0 +1,12 @@
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if TARGET_MX6ULZ_SMM_M2
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config SYS_BOARD
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default "imx6ulz_smm_m2"
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config SYS_VENDOR
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default "bsh"
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config SYS_CONFIG_NAME
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default "imx6ulz_smm_m2"
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endif
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6
board/bsh/imx6ulz_smm_m2/MAINTAINERS
Normal file
6
board/bsh/imx6ulz_smm_m2/MAINTAINERS
Normal file
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@ -0,0 +1,6 @@
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MX6ULZ_SMM_M2 BOARD
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M: Michael Trimarchi <michael@amarulasolutions.com>
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S: Maintained
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F: board/bsh/mx6ulz_smm_m2/
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F: include/configs/imx6ulz_smm_m2.h
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F: configs/imx6ulz_smm_m2_defconfig
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6
board/bsh/imx6ulz_smm_m2/Makefile
Normal file
6
board/bsh/imx6ulz_smm_m2/Makefile
Normal file
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@ -0,0 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0+
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# (C) Copyright 2021 Amarula Solutions B.V.
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obj-y := imx6ulz_smm_m2.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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67
board/bsh/imx6ulz_smm_m2/README
Normal file
67
board/bsh/imx6ulz_smm_m2/README
Normal file
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@ -0,0 +1,67 @@
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How to Update U-Boot on imx6ulz_smm_m2 board
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--------------------------------------------
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Required software on the host PC:
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- UUU: https://github.com/NXPmicro/mfgtools
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Build U-Boot for m2:
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$ make mrproper
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$ make imx6ulz_smm_m2_defconfig
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$ make
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This generates the SPL and u-boot-dtb.img binaries.
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1. Loading U-Boot via USB Serial Download Protocol
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Copy SPL and u-boot-dtb.img to the uuu folder.
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Load the U-Boot via USB:
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$ sudo uuu -v -b nand_script.lst u-boot-with-spl.imx
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where nand_script.lst contains the following:
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uuu_version 1.2.39
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# @_flash.bin | bootloader
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# @_image [_flash.bin] | image burn to nand, default is the same as bootloader
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# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
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SDP: boot -f _flash.bin
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# This command will be run when ROM support stream mode
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# i.MX8QXP, i.MX8QM
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SDPS: boot -f _flash.bin
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# These commands will be run when use SPL and will be skipped if no spl
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# SDPU will be deprecated. please use SDPV instead of SDPU
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# {
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SDPU: delay 1000
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SDPU: write -f _flash.bin -offset 0x57c00
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SDPU: jump
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# }
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# These commands will be run when use SPL and will be skipped if no spl
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# if (SPL support SDPV)
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# {
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SDPV: delay 1000
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SDPV: write -f _flash.bin -offset 0x11000
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SDPV: jump
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# }
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FB: ucmd setenv fastboot_buffer ${loadaddr}
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FB: download -f _image
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FB: ucmd if test ! -n "$fastboot_bytes"; then setenv fastboot_bytes $filesize; else true; fi
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# Burn image to nandfit partition if needed
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FB: ucmd if env exists nandfit_part; then nand erase.part nandfit; nand write ${fastboot_buffer} nandfit ${fastboot_bytes}; else true; fi;
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FB: ucmd nandbcb init ${fastboot_buffer} nandboot ${fastboot_bytes}
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FB: Done
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Then U-Boot starts and its messages appear in the console program.
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Use the default environment variables:
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=> env default -f -a
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=> saveenv
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53
board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
Normal file
53
board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
Normal file
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@ -0,0 +1,53 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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*
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* Copyright (C) 2021 BSH Hausgeraete GmbH
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*/
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#include <init.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <common.h>
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#include <env.h>
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#include <linux/sizes.h>
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static void setup_gpmi_nand(void)
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{
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setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
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MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
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MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)));
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};
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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return 0;
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}
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int board_init(void)
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{
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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setup_gpmi_nand();
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return 0;
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}
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int board_late_init(void)
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{
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if (is_boot_from_usb()) {
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env_set("bootcmd", "run bootcmd_mfg");
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env_set("bootdelay", "0");
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}
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return 0;
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}
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130
board/bsh/imx6ulz_smm_m2/spl.c
Normal file
130
board/bsh/imx6ulz_smm_m2/spl.c
Normal file
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@ -0,0 +1,130 @@
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// SPDX-License-Identifier: GPL-2.0+
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#include <common.h>
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#include <cpu_func.h>
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#include <hang.h>
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#include <init.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/mx6ull_pins.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <linux/libfdt.h>
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#include <spl.h>
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#include <asm/arch/mx6-ddr.h>
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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static const iomux_v3_cfg_t uart4_pads[] = {
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MX6_PAD_UART4_TX_DATA__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_UART4_RX_DATA__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
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}
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|
||||
static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
|
||||
.grp_addds = 0x00000028,
|
||||
.grp_ddrmode_ctl = 0x00020000,
|
||||
.grp_b0ds = 0x00000028,
|
||||
.grp_ctlds = 0x00000028,
|
||||
.grp_b1ds = 0x00000028,
|
||||
.grp_ddrpke = 0x00000000,
|
||||
.grp_ddrmode = 0x00020000,
|
||||
.grp_ddr_type = 0x000c0000,
|
||||
};
|
||||
|
||||
static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
|
||||
.dram_dqm0 = 0x00000028,
|
||||
.dram_dqm1 = 0x00000028,
|
||||
.dram_ras = 0x00000028,
|
||||
.dram_cas = 0x00000028,
|
||||
.dram_odt0 = 0x00000028,
|
||||
.dram_odt1 = 0x00000028,
|
||||
.dram_sdba2 = 0x00000000,
|
||||
.dram_sdclk_0 = 0x00000028,
|
||||
.dram_sdqs0 = 0x00000028,
|
||||
.dram_sdqs1 = 0x00000028,
|
||||
.dram_reset = 0x000c0028,
|
||||
};
|
||||
|
||||
static struct mx6_mmdc_calibration mx6_mmcd_calib = {
|
||||
.p0_mpwldectrl0 = 0x00000000,
|
||||
.p0_mpwldectrl1 = 0x00100010,
|
||||
.p0_mpdgctrl0 = 0x414c014c,
|
||||
.p0_mpdgctrl1 = 0x00000000,
|
||||
.p0_mprddlctl = 0x40403a42,
|
||||
.p0_mpwrdlctl = 0x4040342e,
|
||||
};
|
||||
|
||||
static struct mx6_ddr_sysinfo ddr_sysinfo = {
|
||||
.dsize = 0,
|
||||
.cs1_mirror = 0,
|
||||
.cs_density = 32,
|
||||
.ncs = 1,
|
||||
.bi_on = 1,
|
||||
.rtt_nom = 1,
|
||||
.rtt_wr = 0,
|
||||
.ralat = 5,
|
||||
.walat = 1,
|
||||
.mif3_mode = 3,
|
||||
.rst_to_cke = 0x23, /* 33 cycles (JEDEC value for DDR3) - total of 500 us */
|
||||
.sde_to_rst = 0x10, /* 14 cycles (JEDEC value for DDR3) - total of 200 us */
|
||||
.refsel = 1,
|
||||
.refr = 3,
|
||||
};
|
||||
|
||||
static struct mx6_ddr3_cfg mem_ddr = {
|
||||
.mem_speed = 1333,
|
||||
.density = 2,
|
||||
.width = 16,
|
||||
.banks = 8,
|
||||
.rowaddr = 13,
|
||||
.coladdr = 10,
|
||||
.pagesz = 2,
|
||||
.trcd = 1350,
|
||||
.trcmin = 4950,
|
||||
.trasmin = 3600,
|
||||
};
|
||||
|
||||
static void ccgr_init(void)
|
||||
{
|
||||
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
|
||||
|
||||
writel(0xFFFFFFFF, &ccm->CCGR0);
|
||||
writel(0xFFFFFFFF, &ccm->CCGR1);
|
||||
writel(0xFFFFFFFF, &ccm->CCGR2);
|
||||
writel(0xFFFFFFFF, &ccm->CCGR3);
|
||||
writel(0xFFFFFFFF, &ccm->CCGR4);
|
||||
writel(0xFFFFFFFF, &ccm->CCGR5);
|
||||
writel(0xFFFFFFFF, &ccm->CCGR6);
|
||||
}
|
||||
|
||||
static void imx6ul_spl_dram_cfg(void)
|
||||
{
|
||||
mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
|
||||
mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
|
||||
}
|
||||
|
||||
void board_init_f(ulong dummy)
|
||||
{
|
||||
ccgr_init();
|
||||
arch_cpu_init();
|
||||
timer_init();
|
||||
setup_iomux_uart();
|
||||
preloader_console_init();
|
||||
imx6ul_spl_dram_cfg();
|
||||
}
|
||||
|
||||
void reset_cpu(void)
|
||||
{
|
||||
}
|
||||
80
configs/imx6ulz_smm_m2_defconfig
Normal file
80
configs/imx6ulz_smm_m2_defconfig
Normal file
|
|
@ -0,0 +1,80 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_MX6=y
|
||||
CONFIG_SYS_TEXT_BASE=0x87800000
|
||||
CONFIG_SYS_MALLOC_LEN=0x1000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x18000
|
||||
CONFIG_SPL_GPIO=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x400000
|
||||
CONFIG_MX6ULL=y
|
||||
CONFIG_TARGET_MX6ULZ_SMM_M2=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-bsh-smm-m2"
|
||||
CONFIG_SPL_TEXT_BASE=0x00908000
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_LEGACY_IMAGE_FORMAT=y
|
||||
CONFIG_BOOTDELAY=3
|
||||
CONFIG_BOARD_LATE_INIT=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x84100000
|
||||
CONFIG_SYS_SPL_MALLOC=y
|
||||
CONFIG_SPL_DMA=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_SPL_USB_HOST=y
|
||||
CONFIG_SPL_USB_GADGET=y
|
||||
CONFIG_SPL_USB_SDP_SUPPORT=y
|
||||
CONFIG_SPL_WATCHDOG=y
|
||||
CONFIG_CMD_DM=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_SDP=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
|
||||
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:4m(nandboot),1m(env),8m(kernel),1m(nanddtb),-(rootfs)"
|
||||
CONFIG_CMD_UBI=y
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
# CONFIG_NET is not set
|
||||
CONFIG_BOUNCE_BUFFER=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_UUU_SUPPORT=y
|
||||
CONFIG_FASTBOOT_FLASH_NAND=y
|
||||
CONFIG_SYS_I2C_MXC=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_USE_FLASH_BBT=y
|
||||
CONFIG_NAND_MXS=y
|
||||
CONFIG_NAND_MXS_DT=y
|
||||
CONFIG_SYS_NAND_ONFI_DETECTION=y
|
||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x111400
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x291400
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX6=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_MXC_UART=y
|
||||
CONFIG_IMX_THERMAL=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="BSH"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
|
||||
CONFIG_CI_UDC=y
|
||||
CONFIG_SDP_LOADADDR=0x877fffc0
|
||||
78
include/configs/imx6ulz_smm_m2.h
Normal file
78
include/configs/imx6ulz_smm_m2.h
Normal file
|
|
@ -0,0 +1,78 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (C) 2021 Amarula Solutions B.V.
|
||||
*
|
||||
*/
|
||||
#ifndef __IMX6ULZ_SMM_M2_CONFIG_H
|
||||
#define __IMX6ULZ_SMM_M2_CONFIG_H
|
||||
|
||||
#include "mx6_common.h"
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <linux/sizes.h>
|
||||
#include <linux/stringify.h>
|
||||
|
||||
/* SPL options */
|
||||
#include "imx6_spl.h"
|
||||
|
||||
#define CONFIG_MXC_UART_BASE UART4_BASE
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(NAND, nand, 0) \
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
#endif /* !CONFIG_SPL_BUILD */
|
||||
|
||||
#define MEM_LAYOUT_ENV_SETTINGS \
|
||||
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
|
||||
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
|
||||
"fdt_addr_r=0x81000000\0" \
|
||||
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
||||
"bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \
|
||||
|
||||
#define NANDARGS \
|
||||
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
|
||||
CONFIG_MTDPARTS_DEFAULT "\0" \
|
||||
"nandargs=setenv bootargs " \
|
||||
"${optargs} " \
|
||||
"mtdparts=${mtdparts} " \
|
||||
"root=${nandroot} " \
|
||||
"rootfstype=${nandrootfstype}\0" \
|
||||
"nandroot=ubi0:root rw ubi.mtd=rootfs\0" \
|
||||
"nandrootfstype=ubifs rootwait=1\0" \
|
||||
"nandboot=echo Booting from nand ...; " \
|
||||
"run nandargs; " \
|
||||
"nand read ${fdt_addr_r} nanddtb; " \
|
||||
"nand read ${loadaddr} kernel; " \
|
||||
"bootz ${loadaddr} - ${fdt_addr_r}\0"
|
||||
|
||||
#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
|
||||
"bootcmd_" #devtypel #instance "=" \
|
||||
"run nandboot\0"
|
||||
|
||||
#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
|
||||
#devtypel #instance " "
|
||||
|
||||
/* Initial environment variables */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
MEM_LAYOUT_ENV_SETTINGS \
|
||||
NANDARGS \
|
||||
BOOTENV
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
#define PHYS_SDRAM_SIZE SZ_128M
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
|
||||
/* NAND */
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
|
||||
#define CONFIG_SYS_NAND_BASE 0x20000000
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue