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arm: dts: k3-j7200-common-proc-board: Enable SERDES DT

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Add default lane function for torrent serdes. This is in sync
with v5.13 Linux Kernel.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210721155849.20994-14-kishon@ti.com
This commit is contained in:
Aswath Govindraju 2021-07-21 21:28:42 +05:30 committed by Lokesh Vutla
parent 6c4be8eb7e
commit cbea79867e
1 changed files with 23 additions and 0 deletions
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23
arch/arm/dts/k3-j7200-common-proc-board.dts
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@ -9,6 +9,7 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h> #include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/mux/ti-serdes.h> #include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/phy/phy.h>
/ { / {
chosen { chosen {
@ -281,3 +282,25 @@
ti,adc-channels = <0 1 2 3 4 5 6 7>; ti,adc-channels = <0 1 2 3 4 5 6 7>;
}; };
}; };
&serdes_refclk {
clock-frequency = <100000000>;
};
&serdes0 {
serdes0_pcie_link: link@0 {
reg = <0>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
};
serdes0_qsgmii_link: link@1 {
reg = <2>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_QSGMII>;
resets = <&serdes_wiz0 3>;
};
};