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https://github.com/AsahiLinux/u-boot
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Incorporate Patch by Lutz Dennig, 15 Jul 2003.
This commit is contained in:
wdenk
parent
ad12965db5
commit
cb4dbb7bbc
5 changed files with 54 additions and 35 deletions
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2001
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* (C) Copyright 2001-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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@ -37,9 +37,9 @@
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/*
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* Memory Controller Using
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*
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* CS0 - Flash memory (0x40000000)
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* CS1 - SDRAM (0x00000000}
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* CS2 -
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* CS0 - Flash memory (0x40000000)
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* CS1 - FLASH memory (0x????????)
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* CS2 - SDRAM (0x00000000)
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* CS3 -
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* CS4 -
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* CS5 -
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@ -148,7 +148,7 @@ long int initdram (int board_type)
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udelay (1000);
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/*
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* Check Bank 0 Memory Size for re-configuration
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* Check Bank 2 Memory Size for re-configuration
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*
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* try 8 column mode
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*/
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@ -1044,11 +1044,25 @@ static void lcd_enable (void)
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#if defined(CONFIG_R360MPI)
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{
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extern void r360_i2c_lcd_write (uchar data0, uchar data1);
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unsigned long bgi, ctr;
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char *p;
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if ((p = getenv("lcdbgi")) != NULL) {
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bgi = simple_strtoul (p, 0, 10) & 0xFFF;
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} else {
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bgi = 0xFFF;
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}
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if ((p = getenv("lcdctr")) != NULL) {
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ctr = simple_strtoul (p, 0, 10) & 0xFFF;
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} else {
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ctr=0x7FF;
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}
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r360_i2c_lcd_write(0x10, 0x01);
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r360_i2c_lcd_write(0x20, 0x01);
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r360_i2c_lcd_write(0x3F, 0xFF);
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r360_i2c_lcd_write(0x47, 0xFF);
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r360_i2c_lcd_write(0x30 | ((bgi>>8) & 0xF), bgi & 0xFF);
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r360_i2c_lcd_write(0x40 | ((ctr>>8) & 0xF), ctr & 0xFF);
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}
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#endif /* CONFIG_R360MPI */
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#ifdef CONFIG_RBC823
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@ -72,20 +72,20 @@ tests. All POST tests will be divided into the following groups:
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This group will contain those tests that do not take much
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time and can be run on the regular basis (e.g. CPU test)
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3) Tests running on power-fail booting only
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3) Tests running on in special "slow test more" only
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This group will contain POST tests that consume much time
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and cannot be run regularly (e.g. I2C test)
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and cannot be run regularly (e.g. strong memory test, I2C test)
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4) Manually executed tests
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This group will contain those tests that can be run manually.
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If necessary, some tests may belong to several groups simultaneously.
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For example, SDRAM test may run on both noarmal and power-fail
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booting. On normal booting, SDRAM test may perform a fast superficial
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memory test only, while running on power-fail booting it may perform
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a full memory check-up.
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For example, SDRAM test may run in both normal and "slow test" mode.
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In normal mode, SDRAM test may perform a fast superficial memory test
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only, while running in slow test mode it may perform a full memory
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check-up.
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Also, all tests will be discriminated by the moment they run at.
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Specifically, the following groups will be singled out:
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@ -114,13 +114,15 @@ rest of U-Boot.
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The following flags will be defined:
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#define POST_ROM 0x01 /* test runs in ROM */
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#define POST_RAM 0x02 /* test runs in RAM */
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#define POST_POWERON 0x04 /* test runs on power-on booting */
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#define POST_NORMAL 0x08 /* test runs on normal booting */
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#define POST_SHUTDOWN 0x10 /* test runs on power-fail booting */
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#define POST_MANUAL 0x20 /* test can be executed manually */
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#define POST_REBOOT 0x80 /* test may cause rebooting */
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#define POST_POWERON 0x01 /* test runs on power-on booting */
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#define POST_NORMAL 0x02 /* test runs on normal booting */
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#define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */
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#define POST_POWERTEST 0x08 /* test runs after watchdog reset */
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#define POST_ROM 0x100 /* test runs in ROM */
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#define POST_RAM 0x200 /* test runs in RAM */
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#define POST_MANUAL 0x400 /* test can be executed manually */
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#define POST_REBOOT 0x800 /* test may cause rebooting */
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#define POST_PREREL 0x1000 /* test runs before relocation */
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The POST layer will export the following interface routines:
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@ -168,6 +170,13 @@ U-Boot common code:
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will be called on power-fail booting after running all POST
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tests.
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o) int post_hotkeys_pressed(gd_t *gd)
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This routine will scan the keyboard to detect if a magic key
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combination has been pressed, or otherwise detect if the
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power-on long-running tests shall be executed or not ("normal"
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versus "slow" test mode).
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The list of available POST tests be kept in the post_tests array
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filled at U-Boot build time. The format of entry in this array will
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be as follows:
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@ -725,8 +734,3 @@ TBD
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2.2.3.4. SPI test
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TBD
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2.3. Design notes
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Currently it is unknown how we will power off the board after running
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all power-fail POST tests. This point needs further clarification.
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@ -51,7 +51,7 @@
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#undef CONFIG_8xx_CONS_NONE
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#define CONFIG_BAUDRATE 115200 /* console baudrate in bps */
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#if 0
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#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
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#define CONFIG_BOOTDELAY 0 /* immediate boot */
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#else
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#endif
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@ -77,14 +77,6 @@
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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#if 0
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#ifdef CONFIG_LCD
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# undef CONFIG_STATUS_LED /* disturbs display */
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#else
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# define CONFIG_STATUS_LED 1 /* Status LED enabled */
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#endif /* CONFIG_LCD */
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#endif
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#define CONFIG_CAN_DRIVER /* CAN Driver support enabled */
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
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@ -125,6 +117,7 @@
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CFG_CMD_DATE | \
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CFG_CMD_I2C | \
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CFG_CMD_IDE | \
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CFG_CMD_JFFS2 | \
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CFG_CMD_PCMCIA | \
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CFG_CMD_BSP )
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@ -134,6 +127,9 @@
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_DEVICE_NULLDEV 1 /* we need the null device */
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#define CFG_CONSOLE_IS_IN_ENV 1 /* must set console from env */
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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@ -154,6 +150,11 @@
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/* JFFS2 stuff */
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#define CFG_JFFS2_FIRST_BANK 0
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#define CFG_JFFS2_NUM_BANKS 1
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#define CFG_JFFS2_FIRST_SECTOR 24
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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@ -24,6 +24,6 @@
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#ifndef __VERSION_H__
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#define __VERSION_H__
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#define U_BOOT_VERSION "U-Boot 0.4.3"
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#define U_BOOT_VERSION "U-Boot 0.4.4"
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#endif /* __VERSION_H__ */
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