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https://github.com/AsahiLinux/u-boot
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net: dc2114x: Clean up init code
Clean up the driver init code to bring it up to standards with U-Boot coding style, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
parent
69529c9120
commit
ca5cb04b7f
1 changed files with 31 additions and 33 deletions
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@ -167,33 +167,30 @@ static struct pci_device_id supported[] = {
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int dc21x4x_initialize(bd_t *bis)
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int dc21x4x_initialize(bd_t *bis)
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{
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{
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int idx=0;
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struct eth_device *dev;
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int card_number = 0;
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unsigned short status;
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unsigned int cfrv;
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unsigned char timer;
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unsigned char timer;
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unsigned int iobase;
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pci_dev_t devbusfn;
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int card_number = 0;
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unsigned int iobase;
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pci_dev_t devbusfn;
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unsigned short status;
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unsigned int cfrv;
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struct eth_device* dev;
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int idx = 0;
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while(1) {
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while (1) {
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devbusfn = pci_find_devices(supported, idx++);
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devbusfn = pci_find_devices(supported, idx++);
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if (devbusfn == -1) {
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if (devbusfn == -1)
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break;
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break;
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}
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/* Get the chip configuration revision register. */
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/* Get the chip configuration revision register. */
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pci_read_config_dword(devbusfn, PCI_REVISION_ID, &cfrv);
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pci_read_config_dword(devbusfn, PCI_REVISION_ID, &cfrv);
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if ((cfrv & CFRV_RN) < DC2114x_BRK ) {
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if ((cfrv & CFRV_RN) < DC2114x_BRK) {
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printf("Error: The chip is not DC21143.\n");
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printf("Error: The chip is not DC21143.\n");
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continue;
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continue;
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}
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}
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pci_read_config_word(devbusfn, PCI_COMMAND, &status);
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pci_read_config_word(devbusfn, PCI_COMMAND, &status);
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status |=
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status |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER;
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pci_write_config_word(devbusfn, PCI_COMMAND, status);
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pci_write_config_word(devbusfn, PCI_COMMAND, status);
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pci_read_config_word(devbusfn, PCI_COMMAND, &status);
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pci_read_config_word(devbusfn, PCI_COMMAND, &status);
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@ -211,30 +208,31 @@ int dc21x4x_initialize(bd_t *bis)
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pci_read_config_byte(devbusfn, PCI_LATENCY_TIMER, &timer);
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pci_read_config_byte(devbusfn, PCI_LATENCY_TIMER, &timer);
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if (timer < 0x60) {
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if (timer < 0x60) {
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pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x60);
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pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER,
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0x60);
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}
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}
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/* read BAR for memory space access */
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/* read BAR for memory space access */
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pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase);
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pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase);
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iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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debug ("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase);
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debug("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase);
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dev = (struct eth_device*) malloc(sizeof *dev);
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dev = (struct eth_device *)malloc(sizeof(*dev));
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if (!dev) {
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if (!dev) {
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printf("Can not allocalte memory of dc21x4x\n");
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printf("Can not allocalte memory of dc21x4x\n");
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break;
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break;
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}
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}
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memset(dev, 0, sizeof(*dev));
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memset(dev, 0, sizeof(*dev));
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sprintf(dev->name, "dc21x4x#%d", card_number);
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sprintf(dev->name, "dc21x4x#%d", card_number);
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dev->iobase = pci_mem_to_phys(devbusfn, iobase);
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dev->iobase = pci_mem_to_phys(devbusfn, iobase);
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dev->priv = (void*) devbusfn;
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dev->priv = (void *)devbusfn;
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dev->init = dc21x4x_init;
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dev->init = dc21x4x_init;
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dev->halt = dc21x4x_halt;
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dev->halt = dc21x4x_halt;
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dev->send = dc21x4x_send;
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dev->send = dc21x4x_send;
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dev->recv = dc21x4x_recv;
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dev->recv = dc21x4x_recv;
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/* Ensure we're not sleeping. */
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/* Ensure we're not sleeping. */
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pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
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pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
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@ -251,10 +249,10 @@ int dc21x4x_initialize(bd_t *bis)
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return card_number;
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return card_number;
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}
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}
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static int dc21x4x_init(struct eth_device* dev, bd_t* bis)
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static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
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{
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{
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int i;
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int i;
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int devbusfn = (int) dev->priv;
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int devbusfn = (int)dev->priv;
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/* Ensure we're not sleeping. */
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/* Ensure we're not sleeping. */
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pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
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pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
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@ -271,12 +269,12 @@ static int dc21x4x_init(struct eth_device* dev, bd_t* bis)
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for (i = 0; i < NUM_RX_DESC; i++) {
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for (i = 0; i < NUM_RX_DESC; i++) {
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rx_ring[i].status = cpu_to_le32(R_OWN);
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rx_ring[i].status = cpu_to_le32(R_OWN);
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rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
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rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
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rx_ring[i].buf = cpu_to_le32(
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rx_ring[i].buf =
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phys_to_bus((u32)net_rx_packets[i]));
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cpu_to_le32(phys_to_bus((u32)net_rx_packets[i]));
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rx_ring[i].next = 0;
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rx_ring[i].next = 0;
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}
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}
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for (i=0; i < NUM_TX_DESC; i++) {
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for (i = 0; i < NUM_TX_DESC; i++) {
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tx_ring[i].status = 0;
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tx_ring[i].status = 0;
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tx_ring[i].des1 = 0;
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tx_ring[i].des1 = 0;
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tx_ring[i].buf = 0;
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tx_ring[i].buf = 0;
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@ -291,8 +289,8 @@ static int dc21x4x_init(struct eth_device* dev, bd_t* bis)
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tx_ring[txRingSize - 1].des1 |= cpu_to_le32(TD_TER);
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tx_ring[txRingSize - 1].des1 |= cpu_to_le32(TD_TER);
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/* Tell the adapter where the TX/RX rings are located. */
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/* Tell the adapter where the TX/RX rings are located. */
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OUTL(dev, phys_to_bus((u32) &rx_ring), DE4X5_RRBA);
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OUTL(dev, phys_to_bus((u32)&rx_ring), DE4X5_RRBA);
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OUTL(dev, phys_to_bus((u32) &tx_ring), DE4X5_TRBA);
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OUTL(dev, phys_to_bus((u32)&tx_ring), DE4X5_TRBA);
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START_DE4X5(dev);
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START_DE4X5(dev);
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