Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-24 13:43:28 +00:00
Code Issues Projects Releases Packages Wiki Activity

mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI

Browse source 
There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
needs to be enabled for multi block writes (MMC CMD 18).

Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
This commit is contained in:
Usama Arif 2021-10-19 15:49:48 +01:00 committed by Jaehoon Chung
parent 44645f87de
commit c95b0297e9
2 changed files with 15 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
drivers/mmc/arm_pl180_mmci.c
View file

@ -282,6 +282,14 @@ static int host_request(struct mmc *dev,
return result;
}
static int check_peripheral_id(struct pl180_mmc_host *host, u32 periph_id)
{
return readl(&host->base->periph_id0) == (periph_id & 0xFF) &&
readl(&host->base->periph_id1) == ((periph_id >> 8) & 0xFF) &&
readl(&host->base->periph_id2) == ((periph_id >> 16) & 0xFF) &&
readl(&host->base->periph_id3) == ((periph_id >> 24) & 0xFF);
}
static int host_set_ios(struct mmc *dev)
{
struct pl180_mmc_host *host = dev->priv;
@ -337,6 +345,12 @@ static int host_set_ios(struct mmc *dev)
sdi_clkcr &= ~(SDI_CLKCR_WIDBUS_MASK);
sdi_clkcr |= buswidth;
}
/* For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
* needs to be enabled for multi block writes (MMC CMD 18).
*/
if (check_peripheral_id(host, 0x02041180) ||
check_peripheral_id(host, 0x03041180))
sdi_clkcr |= SDI_CLKCR_HWFCEN;
writel(sdi_clkcr, &host->base->clock);
udelay(CLK_CHANGE_DELAY);

1
drivers/mmc/arm_pl180_mmci.h
View file

@ -43,6 +43,7 @@
#define SDI_CLKCR_CLKEN 0x00000100
#define SDI_CLKCR_PWRSAV 0x00000200
#define SDI_CLKCR_BYPASS 0x00000400
#define SDI_CLKCR_HWFCEN 0x00001000
#define SDI_CLKCR_WIDBUS_MASK 0x00001800
#define SDI_CLKCR_WIDBUS_1 0x00000000
#define SDI_CLKCR_WIDBUS_4 0x00000800