From c7df6483c2484073c6953885886c4aa8aad84890 Mon Sep 17 00:00:00 2001 From: YouMin Chen Date: Tue, 7 Jan 2020 15:15:21 +0800 Subject: [PATCH] ram: rk3328: add support ddr4 init Add rk3328-sdram-ddr4-666.dtsi for support ddr4 init. Signed-off-by: YouMin Chen Signed-off-by: Kever Yang --- arch/arm/dts/rk3328-sdram-ddr4-666.dtsi | 216 ++++++++++++++++++++++++ 1 file changed, 216 insertions(+) create mode 100644 arch/arm/dts/rk3328-sdram-ddr4-666.dtsi diff --git a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi new file mode 100644 index 0000000000..0859649a69 --- /dev/null +++ b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + +&dmc { + rockchip,sdram-params = < + 0x1 + 0xA + 0x2 + 0x1 + 0x0 + 0x0 + 0x11 + 0x0 + 0x11 + 0x0 + 0 + + 0x94291288 + 0x00000000 + 0x00000027 + 0x00000462 + 0x00000015 + 0x00000242 + 0x000000ff + + 333 + 0 + 1 + 0 + 0 + + 0x00000000 + 0x43049010 + 0x00000064 + 0x0028003b + 0x000000d0 + 0x00020053 + 0x000000d4 + 0x00220000 + 0x000000d8 + 0x00000100 + 0x000000dc + 0x00040000 + 0x000000e0 + 0x00000000 + 0x000000e4 + 0x00110000 + 0x000000e8 + 0x00000420 + 0x000000ec + 0x00000400 + 0x000000f4 + 0x000f011f + 0x00000100 + 0x09060b06 + 0x00000104 + 0x00020209 + 0x00000108 + 0x0505040a + 0x0000010c + 0x0040400c + 0x00000110 + 0x05030206 + 0x00000114 + 0x03030202 + 0x00000120 + 0x03030b03 + 0x00000124 + 0x00020208 + 0x00000180 + 0x01000040 + 0x00000184 + 0x00000000 + 0x00000190 + 0x07030003 + 0x00000198 + 0x05001100 + 0x000001a0 + 0xc0400003 + 0x00000240 + 0x06000604 + 0x00000244 + 0x00000201 + 0x00000250 + 0x00000f00 + 0x00000490 + 0x00000001 + 0xffffffff + 0xffffffff + 0xffffffff + 0xffffffff + + 0x00000004 + 0x0000000c + 0x00000028 + 0x0000000a + 0x0000002c + 0x00000000 + 0x00000030 + 0x00000009 + 0xffffffff + 0xffffffff + + 0x77 + 0x88 + 0x79 + 0x79 + 0x87 + 0x97 + 0x87 + 0x78 + 0x77 + 0x78 + 0x87 + 0x88 + 0x87 + 0x87 + 0x77 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x79 + 0x9 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x79 + 0x9 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x78 + 0x77 + 0x79 + 0x9 + + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x78 + 0x69 + 0x9 + + 0x77 + 0x78 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x77 + 0x79 + 0x9 + >; +};