arm: rmobile: rcar: Add infomation of bits for module control register

This adds infomation of bits for module control register. This is used
to control modules on ARM R-Car SoCs.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu 2014-12-02 16:52:22 +09:00 committed by Nobuhiro Iwamatsu
parent 11d902c6a6
commit c72dd8eab1
4 changed files with 53 additions and 0 deletions

View file

@ -15,6 +15,19 @@
#define CONFIG_SYS_I2C_SH_BASE2 0xE6520000
#define CONFIG_SYS_I2C_SH_BASE3 0xE60B0000
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00640801
#define MSTP1_BITS 0xDB6E9BDF
#define MSTP2_BITS 0x300DA1FC
#define MSTP3_BITS 0xF08CF831
#define MSTP4_BITS 0x80000184
#define MSTP5_BITS 0x44C00046
#define MSTP7_BITS 0x07F30718
#define MSTP8_BITS 0x01F0FF84
#define MSTP9_BITS 0xF5979FCF
#define MSTP10_BITS 0xFFFEFFE0
#define MSTP11_BITS 0x00000000
#define R8A7790_CUT_ES2X 2
#define IS_R8A7790_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X)

View file

@ -51,6 +51,19 @@
#define DBSC3_1_QOS_W15_BASE 0xE67A2F00
#define DBSC3_1_DBADJ2 0xE67A00C8
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00640801
#define MSTP1_BITS 0x9B6C9B5A
#define MSTP2_BITS 0x100D21FC
#define MSTP3_BITS 0xF08CD810
#define MSTP4_BITS 0x800001C4
#define MSTP5_BITS 0x44C00046
#define MSTP7_BITS 0x05BFE618
#define MSTP8_BITS 0x40C0FE85
#define MSTP9_BITS 0xFF979FFF
#define MSTP10_BITS 0xFFFEFFE0
#define MSTP11_BITS 0x000001C0
#define R8A7791_CUT_ES2X 2
#define IS_R8A7791_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7791_CUT_ES2X)

View file

@ -56,6 +56,20 @@
/*
* R8A7793 I/O Product Information
*/
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00640801
#define MSTP1_BITS 0x9B6C9B5A
#define MSTP2_BITS 0x100D21FC
#define MSTP3_BITS 0xF08CD810
#define MSTP4_BITS 0x800001C4
#define MSTP5_BITS 0x44C00046
#define MSTP7_BITS 0x05BFE618
#define MSTP8_BITS 0x40C0FE85
#define MSTP9_BITS 0xFF979FFF
#define MSTP10_BITS 0xFFFEFFE0
#define MSTP11_BITS 0x000001C0
#define R8A7793_CUT_ES2X 2
#define IS_R8A7793_ES2() \
(rmobile_get_cpu_rev_integer() == R8A7793_CUT_ES2X)

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@ -14,4 +14,17 @@
/* SH-I2C */
#define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000
/* Module stop control/status register bits */
#define MSTP0_BITS 0x00440801
#define MSTP1_BITS 0x936899DA
#define MSTP2_BITS 0x100D21FC
#define MSTP3_BITS 0xE084D810
#define MSTP4_BITS 0x800001C4
#define MSTP5_BITS 0x40C00044
#define MSTP7_BITS 0x013FE618
#define MSTP8_BITS 0x40803C05
#define MSTP9_BITS 0xFB879FEE
#define MSTP10_BITS 0xFFFEFFE0
#define MSTP11_BITS 0x000001C0
#endif /* __ASM_ARCH_R8A7794_H */