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ppc4xx: Fix build problems of IBM DDR2 NAND booting targets

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This change is needed to compile the PPC4xx NAND booting targets
equipped with the IBM DDR2 SDRAM controller.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2010-11-23 14:32:06 +01:00 committed by Wolfgang Denk
parent aa72d8baaa
commit c56f84ca9c
1 changed files with 0 additions and 12 deletions
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12
board/amcc/canyonlands/canyonlands.c
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@ -363,18 +363,6 @@ int checkboard(void)
} }
#endif /* !defined(CONFIG_ARCHES) */ #endif /* !defined(CONFIG_ARCHES) */
#if defined(CONFIG_NAND_U_BOOT)
/*
* NAND booting U-Boot version uses a fixed initialization, since the whole
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
* code.
*/
phys_size_t initdram(int board_type)
{
return CONFIG_SYS_MBYTES_SDRAM << 20;
}
#endif
#if defined(CONFIG_PCI) #if defined(CONFIG_PCI)
int board_pcie_first(void) int board_pcie_first(void)
{ {