mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
blackfin: convert to use CONFIG_SYS_I2C framework
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
This commit is contained in:
parent
a6be70f7ec
commit
c469703ba0
23 changed files with 88 additions and 170 deletions
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@ -13,6 +13,8 @@
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#include <asm/twi.h>
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#include <asm/io.h>
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static struct twi_regs *i2c_get_base(struct i2c_adapter *adap);
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/* Every register is 32bit aligned, but only 16bits in size */
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#define ureg(name) u16 name; u16 __pad_##name;
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struct twi_regs {
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@ -36,25 +38,12 @@ struct twi_regs {
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};
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#undef ureg
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/* U-Boot I2C framework allows only one active device at a time. */
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#ifdef TWI_CLKDIV
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#define TWI0_CLKDIV TWI_CLKDIV
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#endif
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static struct twi_regs *twi = (void *)TWI0_CLKDIV;
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#ifdef DEBUG
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# define dmemset(s, c, n) memset(s, c, n)
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#else
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# define dmemset(s, c, n)
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#endif
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#define debugi(fmt, args...) \
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debug( \
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"MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
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twi->master_stat, twi->fifo_stat, twi->int_stat, \
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__func__, __LINE__, ## args)
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#ifdef CONFIG_TWICLK_KHZ
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# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
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# ifdef CONFIG_SYS_MAX_I2C_BUS
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# undef CONFIG_SYS_MAX_I2C_BUS
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# endif
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#define CONFIG_SYS_MAX_I2C_BUS 1
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#endif
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/*
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@ -70,7 +59,7 @@ static struct twi_regs *twi = (void *)TWI0_CLKDIV;
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#define SYS_I2C_DUTY I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED)
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/* Note: duty is inverse of speed, so the comparisons below are correct */
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#if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN
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# error "The Blackfin I2C hardware can only operate 20KHz - 400KHz"
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# error "The I2C hardware can only operate 20KHz - 400KHz"
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#endif
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/* All transfers are described by this data structure */
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@ -92,7 +81,7 @@ struct i2c_msg {
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* wait_for_completion - manage the actual i2c transfer
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* @msg: the i2c msg
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*/
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static int wait_for_completion(struct i2c_msg *msg)
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static int wait_for_completion(struct twi_regs *twi, struct i2c_msg *msg)
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{
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u16 int_stat, ctl;
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ulong timebase = get_timer(0);
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@ -101,7 +90,6 @@ static int wait_for_completion(struct i2c_msg *msg)
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int_stat = readw(&twi->int_stat);
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if (int_stat & XMTSERV) {
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debugi("processing XMTSERV");
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writew(XMTSERV, &twi->int_stat);
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if (msg->alen) {
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writew(*(msg->abuf++), &twi->xmt_data8);
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@ -119,7 +107,6 @@ static int wait_for_completion(struct i2c_msg *msg)
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}
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}
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if (int_stat & RCVSERV) {
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debugi("processing RCVSERV");
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writew(RCVSERV, &twi->int_stat);
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if (msg->len) {
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*(msg->buf++) = readw(&twi->rcv_data8);
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@ -130,12 +117,10 @@ static int wait_for_completion(struct i2c_msg *msg)
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}
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}
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if (int_stat & MERR) {
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debugi("processing MERR");
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writew(MERR, &twi->int_stat);
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return msg->len;
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}
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if (int_stat & MCOMP) {
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debugi("processing MCOMP");
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writew(MCOMP, &twi->int_stat);
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if (msg->flags & I2C_M_COMBO && msg->len) {
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ctl = readw(&twi->master_ctl);
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@ -155,16 +140,10 @@ static int wait_for_completion(struct i2c_msg *msg)
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return msg->len;
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}
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/**
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* i2c_transfer - setup an i2c transfer
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* @return: 0 if things worked, non-0 if things failed
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*
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* Here we just get the i2c stuff all prepped and ready, and then tail off
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* into wait_for_completion() for all the bits to go.
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*/
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static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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int len, u8 flags)
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static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr,
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int alen, uint8_t *buffer, int len, uint8_t flags)
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{
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struct twi_regs *twi = i2c_get_base(adap);
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int ret;
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u16 ctl;
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uchar addr_buffer[] = {
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@ -180,12 +159,6 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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.alen = alen,
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};
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dmemset(buffer, 0xff, len);
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debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
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chip, addr, alen, buffer[0], len);
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debugi("flags=0x%02x[%s] ", flags,
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(flags & I2C_M_READ ? "rd" : "wr"));
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/* wait for things to settle */
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while (readw(&twi->master_stat) & BUSBUSY)
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if (ctrlc())
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@ -201,11 +174,9 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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/* prime the pump */
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if (msg.alen) {
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len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
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debugi("first byte=0x%02x", *msg.abuf);
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writew(*(msg.abuf++), &twi->xmt_data8);
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--msg.alen;
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} else if (!(msg.flags & I2C_M_READ) && msg.len) {
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debugi("first byte=0x%02x", *msg.buf);
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writew(*(msg.buf++), &twi->xmt_data8);
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--msg.len;
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}
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@ -222,8 +193,7 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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writew(ctl, &twi->master_ctl);
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/* process the rest */
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ret = wait_for_completion(&msg);
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debugi("ret=%d", ret);
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ret = wait_for_completion(twi, &msg);
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if (ret) {
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ctl = readw(&twi->master_ctl) & ~MEN;
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@ -237,12 +207,9 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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return ret;
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}
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/**
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* i2c_set_bus_speed - set i2c bus speed
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* @speed: bus speed (in HZ)
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*/
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int i2c_set_bus_speed(unsigned int speed)
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static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed)
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{
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struct twi_regs *twi = i2c_get_base(adap);
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u16 clkdiv = I2C_SPEED_TO_DUTY(speed);
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/* Set TWI interface clock */
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@ -257,28 +224,10 @@ int i2c_set_bus_speed(unsigned int speed)
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return 0;
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}
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/**
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* i2c_get_bus_speed - get i2c bus speed
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* @speed: bus speed (in HZ)
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*/
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unsigned int i2c_get_bus_speed(void)
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static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
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{
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u16 clkdiv = readw(&twi->clkdiv) & 0xff;
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/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
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return 5000000 / clkdiv;
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}
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/**
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* i2c_init - initialize the i2c bus
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* @speed: bus speed (in HZ)
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* @slaveaddr: address of device in slave mode (0 - not slave)
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*
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* Slave mode isn't actually implemented. It'll stay that way until
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* we get a real request for it.
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*/
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void i2c_init(int speed, int slaveaddr)
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{
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uint8_t prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
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struct twi_regs *twi = i2c_get_base(adap);
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u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
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/* Set TWI internal clock as 10MHz */
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writew(prescale, &twi->control);
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@ -288,100 +237,69 @@ void i2c_init(int speed, int slaveaddr)
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/* Enable it */
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writew(TWI_ENA | prescale, &twi->control);
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debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
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readw(&twi->clkdiv));
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#if CONFIG_SYS_I2C_SLAVE
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# error I2C slave support not tested/supported
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#endif
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}
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/**
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* i2c_probe - test if a chip exists at a given i2c address
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* @chip: i2c chip addr to search for
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* @return: 0 if found, non-0 if not found
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*/
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int i2c_probe(uchar chip)
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static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip,
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uint addr, int alen, uint8_t *buffer, int len)
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{
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return i2c_transfer(adap, chip, addr, alen, buffer,
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len, alen ? I2C_M_COMBO : I2C_M_READ);
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}
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static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip,
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uint addr, int alen, uint8_t *buffer, int len)
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{
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return i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
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}
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static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
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{
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u8 byte;
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return i2c_read(chip, 0, 0, &byte, 1);
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return adi_i2c_read(adap, chip, 0, 0, &byte, 1);
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}
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/**
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* i2c_read - read data from an i2c device
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* @chip: i2c chip addr
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* @addr: memory (register) address in the chip
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* @alen: byte size of address
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* @buffer: buffer to store data read from chip
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* @len: how many bytes to read
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* @return: 0 on success, non-0 on failure
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*/
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int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
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static struct twi_regs *i2c_get_base(struct i2c_adapter *adap)
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{
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return i2c_transfer(chip, addr, alen, buffer,
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len, (alen ? I2C_M_COMBO : I2C_M_READ));
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}
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/**
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* i2c_write - write data to an i2c device
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* @chip: i2c chip addr
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* @addr: memory (register) address in the chip
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* @alen: byte size of address
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* @buffer: buffer holding data to write to chip
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* @len: how many bytes to write
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* @return: 0 on success, non-0 on failure
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*/
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int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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return i2c_transfer(chip, addr, alen, buffer, len, 0);
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}
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/**
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* i2c_set_bus_num - change active I2C bus
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* @bus: bus index, zero based
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* @returns: 0 on success, non-0 on failure
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*/
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int i2c_set_bus_num(unsigned int bus)
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{
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switch (bus) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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case 0:
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twi = (void *)TWI0_CLKDIV;
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return 0;
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switch (adap->hwadapnr) {
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case 2:
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return (struct twi_regs *)TWI2_CLKDIV;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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case 1:
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twi = (void *)TWI1_CLKDIV;
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return 0;
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return (struct twi_regs *)TWI1_CLKDIV;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case 2:
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twi = (void *)TWI2_CLKDIV;
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return 0;
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#endif
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default: return -1;
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case 0:
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return (struct twi_regs *)TWI0_CLKDIV;
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default:
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printf("wrong hwadapnr: %d\n", adap->hwadapnr);
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}
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return NULL;
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}
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/**
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* i2c_get_bus_num - returns index of active I2C bus
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*/
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unsigned int i2c_get_bus_num(void)
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{
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switch ((unsigned long)twi) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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case TWI0_CLKDIV:
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return 0;
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#endif
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U_BOOT_I2C_ADAP_COMPLETE(adi_i2c0, adi_i2c_init, adi_i2c_probe,
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adi_i2c_read, adi_i2c_write,
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adi_i2c_setspeed,
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CONFIG_SYS_I2C_SPEED,
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0,
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0)
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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case TWI1_CLKDIV:
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return 1;
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U_BOOT_I2C_ADAP_COMPLETE(adi_i2c1, adi_i2c_init, adi_i2c_probe,
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adi_i2c_read, adi_i2c_write,
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adi_i2c_setspeed,
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CONFIG_SYS_I2C_SPEED,
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0,
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1)
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case TWI2_CLKDIV:
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return 2;
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U_BOOT_I2C_ADAP_COMPLETE(adi_i2c2, adi_i2c_init, adi_i2c_probe,
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adi_i2c_read, adi_i2c_write,
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adi_i2c_setspeed,
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CONFIG_SYS_I2C_SPEED,
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0,
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2)
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#endif
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default: return -1;
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}
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}
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@ -122,8 +122,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -134,8 +134,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -131,8 +131,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -119,8 +119,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -134,8 +134,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -103,8 +103,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -121,8 +121,8 @@
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/*
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* I2C settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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#define CONFIG_SYS_I2C_SPEED 50000
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#define CONFIG_SYS_I2C_SLAVE 0
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@ -142,8 +142,8 @@
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/*
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* I2C settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -120,8 +120,8 @@
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/*
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* I2C settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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#define CONFIG_SYS_I2C_SPEED 50000
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#define CONFIG_SYS_I2C_SLAVE 0
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@ -128,8 +128,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_ADI
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#define CONFIG_HARD_I2C 1
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/*
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@ -126,8 +126,8 @@
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/*
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* I2C Settings
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*/
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#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -134,8 +134,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -81,8 +81,8 @@
|
|||
#define CONFIG_PHYLIB
|
||||
|
||||
/* i2c Settings */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C
|
||||
|
||||
/*
|
||||
* Flash Settings
|
||||
|
|
|
@ -73,7 +73,7 @@
|
|||
# ifdef CONFIG_SPI_FLASH
|
||||
# define CONFIG_CMD_SF
|
||||
# endif
|
||||
# if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
|
||||
# if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_SOFT)
|
||||
# define CONFIG_CMD_I2C
|
||||
# define CONFIG_SOFT_I2C_READ_REPEATED_START
|
||||
# endif
|
||||
|
@ -301,7 +301,7 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
|
||||
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_SOFT)
|
||||
# ifndef CONFIG_SYS_I2C_SPEED
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# endif
|
||||
|
|
|
@ -102,8 +102,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -113,8 +113,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -122,8 +122,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -120,8 +120,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -104,8 +104,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -102,8 +102,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -103,8 +103,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -122,8 +122,8 @@
|
|||
/*
|
||||
* I2C Settings
|
||||
*/
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_ADI
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
|
||||
/*
|
||||
|
|
Loading…
Reference in a new issue