Convert CONFIG_PCA953X to Kconfig

This converts the following to Kconfig:
   CONFIG_PCA953X

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-11-19 18:45:30 -05:00
parent 9200011e95
commit c3187fb144
6 changed files with 5 additions and 8 deletions

2
README
View file

@ -483,8 +483,6 @@ The following options need to be configured:
must also be configured. See I2C Support, below. must also be configured. See I2C Support, below.
- GPIO Support: - GPIO Support:
CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
The CFG_SYS_I2C_PCA953X_WIDTH option specifies a list of The CFG_SYS_I2C_PCA953X_WIDTH option specifies a list of
chip-ngpio pairs that tell the PCA953X driver the number of chip-ngpio pairs that tell the PCA953X driver the number of
pins supported by a particular chip. pins supported by a particular chip.

View file

@ -74,6 +74,7 @@ CONFIG_ETHPRIME="FEC"
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_BOUNCE_BUFFER=y CONFIG_BOUNCE_BUFFER=y
CONFIG_CMD_PCA953X=y CONFIG_CMD_PCA953X=y
CONFIG_PCA953X=y
CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y CONFIG_SYS_I2C_MXC=y

View file

@ -520,6 +520,10 @@ config SPL_DM_PCA953X
Now, max 24 bits chips and PCA953X compatible chips are Now, max 24 bits chips and PCA953X compatible chips are
supported supported
config PCA953X
bool "NXP's PCA953X series I2C GPIO (legacy driver)"
depends on !DM_PCA953X
config MPC8XXX_GPIO config MPC8XXX_GPIO
bool "Freescale MPC8XXX GPIO driver" bool "Freescale MPC8XXX GPIO driver"
depends on DM_GPIO depends on DM_GPIO

View file

@ -21,7 +21,6 @@
/* PMIC */ /* PMIC */
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
#define CONFIG_PCA953X
#define CFG_SYS_I2C_PCA953X_ADDR 0x20 #define CFG_SYS_I2C_PCA953X_ADDR 0x20
#define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } #define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }

View file

@ -110,10 +110,6 @@
/* LPDDR4 board total DDR is 3GB */ /* LPDDR4 board total DDR is 3GB */
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */ #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
#ifndef CONFIG_DM_PCA953X
#define CONFIG_PCA953X
#endif
/* Misc configuration */ /* Misc configuration */
#endif /* __IMX8QXP_MEK_H */ #endif /* __IMX8QXP_MEK_H */

View file

@ -15,7 +15,6 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_PCA953X
#define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } #define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
#include "mx6sabre_common.h" #include "mx6sabre_common.h"