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arm64: dts: imx8mm: Add common -u-boot.dtsi

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/soc@0
aips1
aips2
aips3
clk
iomuxc
osc_24m

are common node enablements across imx8mm platform for dm-spi,
dm-pre-reloc stages.

Move them into common dtsi, imx8mm-u-boot.dtsi

Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Jagan Teki 2021-04-26 18:23:46 +05:30 committed by Stefano Babic
parent 3a5435580d
commit c1f09505d5
7 changed files with 51 additions and 209 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

37
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
View file

@ -3,6 +3,8 @@
* Copyright 2020 Compass Electronics Group, LLC
*/
#include "imx8mm-u-boot.dtsi"
/ {
wdt-reboot {
compatible = "wdt-reboot";
@ -11,32 +13,6 @@
};
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&reg_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
};
@ -65,15 +41,6 @@
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&pca6416_0 {
compatible = "ti,tca6416";
};

37
arch/arm/dts/imx8mm-evk-u-boot.dtsi
View file

@ -3,6 +3,8 @@
* Copyright 2019 NXP
*/
#include "imx8mm-u-boot.dtsi"
/ {
binman: binman {
multiple-images;
@ -22,41 +24,6 @@
};
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&reg_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
};

39
arch/arm/dts/imx8mm-u-boot.dtsi Normal file
View file

@ -0,0 +1,39 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Jagan Teki <jagan@amarulasolutions.com>
*/
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&iomuxc {
u-boot,dm-spl;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

35
arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi
View file

@ -3,40 +3,7 @@
* Copyright 2021 Gateworks Corporation
*/
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
#include "imx8mm-u-boot.dtsi"
&gpio1 {
u-boot,dm-spl;

37
arch/arm/dts/imx8mm-venice-u-boot.dtsi
View file

@ -3,6 +3,8 @@
* Copyright 2021 Gateworks Corporation
*/
#include "imx8mm-u-boot.dtsi"
/ {
wdt-reboot {
compatible = "wdt-reboot";
@ -11,41 +13,6 @@
};
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&gpio1 {
u-boot,dm-spl;
};

38
arch/arm/dts/imx8mm-verdin-u-boot.dtsi
View file

@ -2,6 +2,9 @@
/*
* Copyright 2020 Toradex
*/
#include "imx8mm-u-boot.dtsi"
/ {
wdt-reboot {
compatible = "wdt-reboot";
@ -10,27 +13,6 @@
};
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&gpio1 {
u-boot,dm-spl;
};
@ -55,15 +37,6 @@
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&pinctrl_i2c1 {
u-boot,dm-spl;
};
@ -84,11 +57,6 @@
u-boot,dm-spl;
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a20000/pmic} {
u-boot,dm-spl;
};

37
arch/arm/dts/phycore-imx8mm-u-boot.dtsi
View file

@ -4,6 +4,8 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
#include "imx8mm-u-boot.dtsi"
/ {
wdt-reboot {
compatible = "wdt-reboot";
@ -12,41 +14,6 @@
};
};
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&pinctrl_uart3 {
u-boot,dm-spl;
};