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ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB
The Boot ROM supports authentication feature to prevent malformed software from being run on products. The signature is added at the tail of the second stage loader (= SPL in U-boot terminology). The size of the second stage loader was 64KB, and it was consistent across SoCs. The situation changed when LD20 SoC appeared; it loads 80KB second stage loader, and it is the only exception. Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is loaded from the 64KB offset of non-volatile devices. This means the signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot proper image. Let's move the U-Boot proper image to 128KB offset. It uses 48KB for nothing but padding, and we could actually locate the U-Boot proper at 80KB offset. However, the power of 2 generally seems a better choice for the offset address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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0b93e3de1e
commit
c0efc3140e
2 changed files with 14 additions and 9 deletions
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@ -86,9 +86,8 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
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depends on SPL && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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depends on SPL && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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default 0x50 if ARCH_SUNXI
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default 0x50 if ARCH_SUNXI
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default 0x75 if ARCH_DAVINCI
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default 0x75 if ARCH_DAVINCI
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default 0x80 if ARCH_UNIPHIER
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default 0x8a if ARCH_MX6
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default 0x8a if ARCH_MX6
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default 0x100 if ARCH_ROCKCHIP
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default 0x100 if ARCH_ROCKCHIP || ARCH_UNIPHIER
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default 0x140 if ARCH_MVEBU
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default 0x140 if ARCH_MVEBU
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default 0x200 if ARCH_SOCFPGA || ARCH_AT91
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default 0x200 if ARCH_SOCFPGA || ARCH_AT91
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default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
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default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
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@ -230,19 +230,19 @@
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"nor_base=0x42000000\0" \
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"nor_base=0x42000000\0" \
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"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
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"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
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"tftpboot $tmp_addr u-boot-spl.bin &&" \
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"tftpboot $tmp_addr u-boot-spl.bin &&" \
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"setexpr tmp_addr $nor_base + 0x60000 &&" \
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"setexpr tmp_addr $nor_base + 0x70000 && " \
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"tftpboot $tmp_addr u-boot.bin\0" \
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"tftpboot $tmp_addr u-boot.bin\0" \
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"emmcupdate=mmcsetn &&" \
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"emmcupdate=mmcsetn &&" \
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"mmc partconf $mmc_first_dev 0 1 1 &&" \
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"mmc partconf $mmc_first_dev 0 1 1 &&" \
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"tftpboot u-boot-spl.bin &&" \
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"tftpboot u-boot-spl.bin &&" \
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"mmc write $loadaddr 0 80 &&" \
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"mmc write $loadaddr 0 100 && " \
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"tftpboot u-boot.bin &&" \
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"tftpboot u-boot.bin &&" \
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"mmc write $loadaddr 80 780\0" \
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"mmc write $loadaddr 100 700\0" \
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"nandupdate=nand erase 0 0x00100000 &&" \
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"nandupdate=nand erase 0 0x00100000 &&" \
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"tftpboot u-boot-spl.bin &&" \
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"tftpboot u-boot-spl.bin &&" \
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"nand write $loadaddr 0 0x00010000 &&" \
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"nand write $loadaddr 0 0x00020000 && " \
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"tftpboot u-boot.bin &&" \
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"tftpboot u-boot.bin &&" \
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"nand write $loadaddr 0x00010000 0x000f0000\0" \
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"nand write $loadaddr 0x00020000 0x000e0000\0" \
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LINUXBOOT_ENV_SETTINGS
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LINUXBOOT_ENV_SETTINGS
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#define CONFIG_SYS_BOOTMAPSZ 0x20000000
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#define CONFIG_SYS_BOOTMAPSZ 0x20000000
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@ -282,14 +282,18 @@
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
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/* subtract sizeof(struct image_header) */
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/* subtract sizeof(struct image_header) */
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#define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40)
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#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40)
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
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#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
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#if defined(CONFIG_ARCH_UNIPHIER_LD20)
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#define CONFIG_SPL_MAX_SIZE 0x14000
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#else
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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#if defined(CONFIG_ARCH_UNIPHIER_LD11)
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#define CONFIG_SPL_BSS_START_ADDR 0x30012000
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#define CONFIG_SPL_BSS_START_ADDR 0x30012000
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#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
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#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
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@ -297,4 +301,6 @@
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#endif
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#endif
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
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#define CONFIG_SPL_PAD_TO 0x20000
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#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
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#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
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