mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-02-17 22:49:02 +00:00
usb: s3c-otg: Rename struct s3c_plat_otg_data
The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
parent
e30824f439
commit
c0982871df
14 changed files with 16 additions and 16 deletions
|
@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
struct s3c_plat_otg_data socfpga_otg_data = {
|
||||
struct dwc2_plat_otg_data socfpga_otg_data = {
|
||||
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
|
||||
.usb_gusbcfg = 0x1417,
|
||||
};
|
||||
|
|
|
@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
struct s3c_plat_otg_data socfpga_otg_data = {
|
||||
struct dwc2_plat_otg_data socfpga_otg_data = {
|
||||
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
|
||||
.usb_gusbcfg = 0x1417,
|
||||
};
|
||||
|
|
|
@ -95,7 +95,7 @@ int board_mmc_init(bd_t *bis)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
static struct s3c_plat_otg_data bcm_otg_data = {
|
||||
static struct dwc2_plat_otg_data bcm_otg_data = {
|
||||
.regs_otg = HSOTG_BASE_ADDR
|
||||
};
|
||||
|
||||
|
|
|
@ -28,7 +28,7 @@ int board_init(void)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
struct s3c_plat_otg_data socfpga_otg_data = {
|
||||
struct dwc2_plat_otg_data socfpga_otg_data = {
|
||||
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
|
||||
.usb_gusbcfg = 0x1417,
|
||||
};
|
||||
|
|
|
@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
struct s3c_plat_otg_data socfpga_otg_data = {
|
||||
struct dwc2_plat_otg_data socfpga_otg_data = {
|
||||
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
|
||||
.usb_gusbcfg = 0x1417,
|
||||
};
|
||||
|
|
|
@ -183,7 +183,7 @@ static int s5pc1xx_phy_control(int on)
|
|||
return 0;
|
||||
}
|
||||
|
||||
struct s3c_plat_otg_data s5pc110_otg_data = {
|
||||
struct dwc2_plat_otg_data s5pc110_otg_data = {
|
||||
.phy_control = s5pc1xx_phy_control,
|
||||
.regs_phy = S5PC110_PHY_BASE,
|
||||
.regs_otg = S5PC110_OTG_BASE,
|
||||
|
|
|
@ -452,7 +452,7 @@ static int s5pc210_phy_control(int on)
|
|||
return regulator_set_mode(dev, OPMODE_LPM);
|
||||
}
|
||||
|
||||
struct s3c_plat_otg_data s5pc210_otg_data = {
|
||||
struct dwc2_plat_otg_data s5pc210_otg_data = {
|
||||
.phy_control = s5pc210_phy_control,
|
||||
.regs_phy = EXYNOS4X12_USBPHY_BASE,
|
||||
.regs_otg = EXYNOS4X12_USBOTG_BASE,
|
||||
|
|
|
@ -41,7 +41,7 @@ u32 get_board_rev(void)
|
|||
#endif
|
||||
|
||||
static void check_hw_revision(void);
|
||||
struct s3c_plat_otg_data s5pc210_otg_data;
|
||||
struct dwc2_plat_otg_data s5pc210_otg_data;
|
||||
|
||||
int exynos_init(void)
|
||||
{
|
||||
|
@ -419,7 +419,7 @@ static int s5pc210_phy_control(int on)
|
|||
return 0;
|
||||
}
|
||||
|
||||
struct s3c_plat_otg_data s5pc210_otg_data = {
|
||||
struct dwc2_plat_otg_data s5pc210_otg_data = {
|
||||
.phy_control = s5pc210_phy_control,
|
||||
.regs_phy = EXYNOS4_USBPHY_BASE,
|
||||
.regs_otg = EXYNOS4_USBOTG_BASE,
|
||||
|
|
|
@ -303,7 +303,7 @@ static int s5pc210_phy_control(int on)
|
|||
return 0;
|
||||
}
|
||||
|
||||
struct s3c_plat_otg_data s5pc210_otg_data = {
|
||||
struct dwc2_plat_otg_data s5pc210_otg_data = {
|
||||
.phy_control = s5pc210_phy_control,
|
||||
.regs_phy = EXYNOS4X12_USBPHY_BASE,
|
||||
.regs_otg = EXYNOS4X12_USBOTG_BASE,
|
||||
|
|
|
@ -179,7 +179,7 @@ static int s5pc210_phy_control(int on)
|
|||
return 0;
|
||||
}
|
||||
|
||||
struct s3c_plat_otg_data s5pc210_otg_data = {
|
||||
struct dwc2_plat_otg_data s5pc210_otg_data = {
|
||||
.phy_control = s5pc210_phy_control,
|
||||
.regs_phy = EXYNOS4_USBPHY_BASE,
|
||||
.regs_otg = EXYNOS4_USBOTG_BASE,
|
||||
|
|
|
@ -68,7 +68,7 @@ int board_phy_config(struct phy_device *phydev)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_GADGET
|
||||
struct s3c_plat_otg_data socfpga_otg_data = {
|
||||
struct dwc2_plat_otg_data socfpga_otg_data = {
|
||||
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
|
||||
.usb_gusbcfg = 0x1417,
|
||||
};
|
||||
|
|
|
@ -797,7 +797,7 @@ static struct dwc2_udc memory = {
|
|||
* probe - binds to the platform device
|
||||
*/
|
||||
|
||||
int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
|
||||
int s3c_udc_probe(struct dwc2_plat_otg_data *pdata)
|
||||
{
|
||||
struct dwc2_udc *dev = &memory;
|
||||
int retval = 0;
|
||||
|
|
|
@ -78,7 +78,7 @@ struct dwc2_udc {
|
|||
struct usb_gadget gadget;
|
||||
struct usb_gadget_driver *driver;
|
||||
|
||||
struct s3c_plat_otg_data *pdata;
|
||||
struct dwc2_plat_otg_data *pdata;
|
||||
|
||||
int ep0state;
|
||||
struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
|
||||
#define PHY0_SLEEP (1 << 5)
|
||||
|
||||
struct s3c_plat_otg_data {
|
||||
struct dwc2_plat_otg_data {
|
||||
int (*phy_control)(int on);
|
||||
unsigned int regs_phy;
|
||||
unsigned int regs_otg;
|
||||
|
@ -20,6 +20,6 @@ struct s3c_plat_otg_data {
|
|||
unsigned int usb_gusbcfg;
|
||||
};
|
||||
|
||||
int s3c_udc_probe(struct s3c_plat_otg_data *pdata);
|
||||
int s3c_udc_probe(struct dwc2_plat_otg_data *pdata);
|
||||
|
||||
#endif
|
||||
|
|
Loading…
Add table
Reference in a new issue