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Make pixis_set_sgmii more general to support MPC85xx boards.

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The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.

Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
This commit is contained in:
Liu Yu 2008-10-10 11:40:58 +08:00 committed by Wolfgang Denk
parent 5e981d683d
commit bff188baf9
2 changed files with 22 additions and 3 deletions
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22
board/freescale/common/pixis.c
View file

@ -283,7 +283,7 @@ U_BOOT_CMD(
"diswd - Disable watchdog timer \n",
NULL);
#ifdef CONFIG_FSL_SGMII_RISER
#ifdef CONFIG_PIXIS_SGMII_CMD
int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int which_tsec = -1;
@ -295,17 +295,33 @@ int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
which_tsec = simple_strtoul(argv[1], NULL, 0);
switch (which_tsec) {
#ifdef CONFIG_TSEC1
case 1:
mask = PIXIS_VSPEED2_TSEC1SER;
switch_mask = PIXIS_VCFGEN1_TSEC1SER;
break;
#endif
#ifdef CONFIG_TSEC2
case 2:
mask = PIXIS_VSPEED2_TSEC2SER;
switch_mask = PIXIS_VCFGEN1_TSEC2SER;
break;
#endif
#ifdef CONFIG_TSEC3
case 3:
mask = PIXIS_VSPEED2_TSEC3SER;
switch_mask = PIXIS_VCFGEN1_TSEC3SER;
break;
#endif
#ifdef CONFIG_TSEC4
case 4:
mask = PIXIS_VSPEED2_TSEC4SER;
switch_mask = PIXIS_VCFGEN1_TSEC4SER;
break;
#endif
default:
mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER;
switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER;
mask = PIXIS_VSPEED2_MASK;
switch_mask = PIXIS_VCFGEN1_MASK;
break;
}

3
include/configs/MPC8544DS.h
View file

@ -202,6 +202,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define PIXIS_VSPEED2_TSEC3SER 0x1
#define PIXIS_VCFGEN1_TSEC1SER 0x20
#define PIXIS_VCFGEN1_TSEC3SER 0x40
#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
/* define to use L1 as initial stack */
@ -374,6 +376,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_TSEC3 1
#define CONFIG_TSEC3_NAME "eTSEC3"
#define CONFIG_PIXIS_SGMII_CMD
#define CONFIG_FSL_SGMII_RISER 1
#define SGMII_RISER_PHY_OFFSET 0x1c