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x86: Add various minor tidy-ups in mrccache codes
Fix some nits, improve some comments and reorder some codes a little bit. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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2 changed files with 16 additions and 18 deletions
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@ -1,17 +1,17 @@
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/*
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* Copyright (c) 2014 Google, Inc
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* Copyright (C) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_MRCCACHE_H
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#define _ASM_ARCH_MRCCACHE_H
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#ifndef _ASM_MRCCACHE_H
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#define _ASM_MRCCACHE_H
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#define MRC_DATA_ALIGN 0x1000
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#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | ('C' << 16) | \
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('D'<<24))
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#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | \
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('C' << 16) | ('D'<<24))
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__packed struct mrc_data_container {
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struct __packed mrc_data_container {
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u32 signature; /* "MRCD" */
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u32 data_size; /* Size of the 'data' field */
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u32 checksum; /* IP style checksum */
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@ -28,7 +28,7 @@ struct udevice;
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* This searches the MRC cache region looking for the latest record to use
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* for setting up SDRAM
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*
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* @entry: Information about the position and size of the MRC cache
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* @entry: Position and size of MRC cache in SPI flash
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* @return pointer to latest record, or NULL if none
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*/
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struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry);
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@ -36,8 +36,8 @@ struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry);
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/**
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* mrccache_update() - update the MRC cache with a new record
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*
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* This writes a new record to the end of the MRC cache. If the new record is
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* the same as the latest record then the write is skipped
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* This writes a new record to the end of the MRC cache region. If the new
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* record is the same as the latest record then the write is skipped
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*
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* @sf: SPI flash to write to
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* @entry: Position and size of MRC cache in SPI flash
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@ -48,4 +48,4 @@ struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry);
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int mrccache_update(struct udevice *sf, struct fmap_entry *entry,
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struct mrc_data_container *cur);
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#endif
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#endif /* _ASM_MRCCACHE_H */
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@ -1,5 +1,5 @@
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/*
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* From Coreboot src/southbridge/intel/bd82x6x/mrccache.c
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* From coreboot src/southbridge/intel/bd82x6x/mrccache.c
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*
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* Copyright (C) 2014 Google Inc.
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*
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@ -15,17 +15,19 @@
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#include <asm/mrccache.h>
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static struct mrc_data_container *next_mrc_block(
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struct mrc_data_container *mrc_cache)
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struct mrc_data_container *cache)
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{
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/* MRC data blocks are aligned within the region */
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u32 mrc_size = sizeof(*mrc_cache) + mrc_cache->data_size;
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u32 mrc_size = sizeof(*cache) + cache->data_size;
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u8 *region_ptr = (u8 *)cache;
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if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
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mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
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mrc_size += MRC_DATA_ALIGN;
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}
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u8 *region_ptr = (u8 *)mrc_cache;
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region_ptr += mrc_size;
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return (struct mrc_data_container *)region_ptr;
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}
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@ -34,10 +36,6 @@ static int is_mrc_cache(struct mrc_data_container *cache)
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return cache && (cache->signature == MRC_DATA_SIGNATURE);
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}
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/*
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* Find the largest index block in the MRC cache. Return NULL if none is
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* found.
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*/
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struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry)
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{
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struct mrc_data_container *cache, *next;
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