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ARM: tegra: Remove disp1 clock initialization on Tegra210
pll_c is not a valid parent for the disp1 clock, so trying to set it will fail. Given that display is not used in U-Boot, remove the init table entry so that disp1 will keep its default parent (clk_m). Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = {
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{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
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{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
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{ PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
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{ PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
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{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
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{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
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{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
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