mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 06:30:39 +00:00
Update all board to support new bbmiiphy driver (with multibus support)
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This commit is contained in:
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310cecb8cc
commit
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18 changed files with 74 additions and 0 deletions
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@ -84,6 +84,10 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 3 /* Port D */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define CONFIG_SYS_MDIO_PIN 0x00040000 /* PD13 */
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#define CONFIG_SYS_MDC_PIN 0x00080000 /* PD12 */
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@ -150,6 +150,9 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#if CONFIG_ADSTYPE == CONFIG_SYS_8272ADS
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#define CONFIG_SYS_MDIO_PIN 0x00002000 /* PC18 */
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@ -96,6 +96,10 @@
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* Port pins used for bit-banged MII communictions (if applicable).
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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@ -363,6 +363,10 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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@ -103,6 +103,10 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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@ -290,6 +290,10 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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@ -219,6 +219,9 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#if STK82xx_150
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#define CONFIG_SYS_MDIO_PIN 0x00008000 /* PC16 */
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@ -124,6 +124,11 @@
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#define CONFIG_BITBANGMII
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#define MDIO_PORT 1 /* Port B */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define CONFIG_SYS_MDIO_PIN 0x00002000 /* PB18 */
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#define CONFIG_SYS_MDC_PIN 0x00001000 /* PB19 */
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#define MDIO_ACTIVE (iop->pdir |= CONFIG_SYS_MDIO_PIN)
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@ -86,6 +86,10 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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@ -92,6 +92,7 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 0 /* Not used - implemented in BCSR */
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#define MDIO_ACTIVE (*(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFB)
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#define MDIO_TRISTATE (*(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x04)
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#define MDIO_READ (*(vu_char *)(CONFIG_SYS_BCSR + 8) & 1)
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@ -85,6 +85,7 @@
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 0 /* Not used - implemented in BCSR */
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#define MDIO_ACTIVE (*(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFB)
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#define MDIO_TRISTATE (*(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x04)
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#define MDIO_READ (*(vu_char *)(CONFIG_SYS_BCSR + 8) & 1)
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@ -212,6 +212,11 @@
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* Port pins used for bit-banged MII communictions (if applicable).
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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@ -93,6 +93,10 @@
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# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
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# define MDIO_PORT 0 /* Port A */
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# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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# define MDC_DECLARE MDIO_DECLARE
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# define MDIO_DATA_PINMASK 0x00040000 /* Pin 13 */
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# define MDIO_CLCK_PINMASK 0x00080000 /* Pin 12 */
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# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
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# define MDIO_PORT 0 /* Port A */
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# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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# define MDC_DECLARE MDIO_DECLARE
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# define MDIO_DATA_PINMASK 0x00000040 /* Pin 25 */
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# define MDIO_CLCK_PINMASK 0x00000080 /* Pin 24 */
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# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
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# define MDIO_PORT 0 /* Port A */
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# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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# define MDC_DECLARE MDIO_DECLARE
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# define MDIO_DATA_PINMASK 0x00000100 /* Pin 23 */
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# define MDIO_CLCK_PINMASK 0x00000200 /* Pin 22 */
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 0 /* Port A */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define CONFIG_SYS_MDIO_PIN 0x00200000 /* PA10 */
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#define CONFIG_SYS_MDC_PIN 0x00400000 /* PA9 */
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* Port pins used for bit-banged MII communictions (if applicable).
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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*/
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#define MDIO_PORT 2 /* Port A=0, B=1, C=2, D=3 */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x40000000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x40000000)
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#define MDIO_READ ((iop->pdat & 0x40000000) != 0)
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* Port pins used for bit-banged MII communictions (if applicable).
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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* GPIO pins used for bit-banged MII communications
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*/
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#define MDIO_PORT 2 /* Port C */
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#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
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(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
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#define MDC_DECLARE MDIO_DECLARE
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#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
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#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
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#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
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