Merge branch 'master' of git://git.denx.de/u-boot-sh

- More gen2/gen3 fixes
This commit is contained in:
Tom Rini 2019-03-10 10:15:50 -04:00
commit bdbf50f80c
13 changed files with 57 additions and 100 deletions

View file

@ -11,3 +11,10 @@
&scif0 {
u-boot,dm-pre-reloc;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -11,3 +11,10 @@
&scifa0 {
u-boot,dm-pre-reloc;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -11,3 +11,10 @@
&scif0 {
u-boot,dm-pre-reloc;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -16,3 +16,10 @@
status = "okay";
clock-frequency = <400000>;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -11,3 +11,10 @@
&scif0 {
u-boot,dm-pre-reloc;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -11,3 +11,10 @@
&scif2 {
u-boot,dm-pre-reloc;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -11,3 +11,10 @@
&scif2 {
u-boot,dm-pre-reloc;
};
&qspi {
flash@0 {
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
};
};

View file

@ -19,103 +19,4 @@
bank-width = <2>;
status = "disabled";
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 313>;
status = "disabled";
};
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 311>;
status = "disabled";
};
ehci0: usb@ee080100 {
compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
companion= <&ohci0>;
power-domains = <&sysc 32>;
resets = <&cpg 703>;
};
usb2_phy0: usb-phy@ee080200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc 32>;
resets = <&cpg 703>;
#phy-cells = <0>;
};
ehci1: usb@ee0a0100 {
compatible = "generic-ehci";
reg = <0 0xee0a0100 0 0x100>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
companion= <&ohci1>;
power-domains = <&sysc 32>;
resets = <&cpg 702>;
};
usb2_phy1: usb-phy@ee0a0200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
power-domains = <&sysc 32>;
resets = <&cpg 702>;
#phy-cells = <0>;
};
xhci0: usb@ee000000 {
compatible = "renesas,xhci-r8a77965",
"renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc 32>;
resets = <&cpg 328>;
};
};

View file

@ -62,6 +62,7 @@ CONFIG_DM_MMC=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
@ -79,6 +80,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y

View file

@ -64,6 +64,7 @@ CONFIG_SH_MMCIF=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
@ -81,6 +82,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y

View file

@ -62,6 +62,7 @@ CONFIG_DM_MMC=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
@ -79,6 +80,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y

View file

@ -53,6 +53,8 @@
/* SF MTD */
#if defined(CONFIG_SPI_FLASH_MTD) && !defined(CONFIG_SPL_BUILD)
#else
#undef CONFIG_DM_SPI
#undef CONFIG_DM_SPI_FLASH
#undef CONFIG_SPI_FLASH_MTD
#endif

View file

@ -48,7 +48,6 @@
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* ENV setting */