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CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and s3c2410 cpu's which fixes various problems such as the timeouts in tftp being too short. Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no new warnings or errors were found. It was originally submitted on 21/06/2009 but didn't get into the 2009.08 release, and Jean-Pierre made one comment on the original patch (see http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two changes to the original patch: - it's been re-based to the current release - I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it directly to the maintainers of all except the sbc2410 which doesn't have an entry in MAINTAINERS. Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain> Tested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
parent
c0a1dfdec2
commit
bda33be61f
5 changed files with 24 additions and 36 deletions
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@ -39,6 +39,7 @@
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#endif
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#endif
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int timer_load_val = 0;
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int timer_load_val = 0;
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static ulong timer_clk;
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/* macro to read the 16 bit timer */
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/* macro to read the 16 bit timer */
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static inline ulong READ_TIMER(void)
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static inline ulong READ_TIMER(void)
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@ -66,6 +67,7 @@ int timer_init (void)
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* @33.25MHz and 15625 @ 50 MHz
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* @33.25MHz and 15625 @ 50 MHz
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*/
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*/
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timer_load_val = get_PCLK()/(2 * 16 * 100);
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timer_load_val = get_PCLK()/(2 * 16 * 100);
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timer_clk = get_PCLK() / (2 * 16);
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}
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}
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/* load value for 10 ms timeout */
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/* load value for 10 ms timeout */
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lastdec = timers->TCNTB4 = timer_load_val;
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lastdec = timers->TCNTB4 = timer_load_val;
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@ -100,13 +102,13 @@ void set_timer (ulong t)
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void udelay (unsigned long usec)
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void udelay (unsigned long usec)
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{
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{
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ulong tmo;
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ulong tmo;
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ulong start = get_timer(0);
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ulong start = get_ticks();
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tmo = usec / 1000;
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tmo = usec / 1000;
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tmo *= (timer_load_val * 100);
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tmo *= (timer_load_val * 100);
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tmo /= 1000;
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tmo /= 1000;
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while ((ulong)(get_timer_masked () - start) < tmo)
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while ((ulong) (get_ticks() - start) < tmo)
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/*NOP*/;
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/*NOP*/;
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}
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}
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@ -119,18 +121,9 @@ void reset_timer_masked (void)
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ulong get_timer_masked (void)
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ulong get_timer_masked (void)
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{
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{
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ulong now = READ_TIMER();
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ulong tmr = get_ticks();
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if (lastdec >= now) {
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return tmr / (timer_clk / CONFIG_SYS_HZ);
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/* normal mode */
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timestamp += lastdec - now;
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} else {
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/* we have an overflow ... */
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timestamp += lastdec + timer_load_val - now;
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}
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lastdec = now;
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return timestamp;
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}
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}
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void udelay_masked (unsigned long usec)
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void udelay_masked (unsigned long usec)
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@ -148,10 +141,10 @@ void udelay_masked (unsigned long usec)
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tmo /= (1000*1000);
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tmo /= (1000*1000);
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}
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}
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endtime = get_timer_masked () + tmo;
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endtime = get_ticks() + tmo;
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do {
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do {
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ulong now = get_timer_masked ();
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ulong now = get_ticks();
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diff = endtime - now;
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diff = endtime - now;
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} while (diff >= 0);
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} while (diff >= 0);
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}
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}
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@ -162,7 +155,18 @@ void udelay_masked (unsigned long usec)
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*/
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*/
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unsigned long long get_ticks(void)
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unsigned long long get_ticks(void)
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{
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{
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return get_timer(0);
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ulong now = READ_TIMER();
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if (lastdec >= now) {
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/* normal mode */
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timestamp += lastdec - now;
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} else {
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/* we have an overflow ... */
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timestamp += lastdec + timer_load_val - now;
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}
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lastdec = now;
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return timestamp;
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}
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}
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/*
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/*
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@ -139,9 +139,7 @@
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#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
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/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
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#define CONFIG_SYS_HZ 1000
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/* it to wrap 100 times (total 1562500) to get 1 sec. */
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#define CONFIG_SYS_HZ 1562500
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/* valid baudrates */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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@ -141,9 +141,7 @@
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#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */
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/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
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#define CONFIG_SYS_HZ 1000
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/* it to wrap 100 times (total 1562500) to get 1 sec. */
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#define CONFIG_SYS_HZ 1562500
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/* valid baudrates */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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@ -124,9 +124,7 @@
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#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
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/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
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#define CONFIG_SYS_HZ 1000
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/* it to wrap 100 times (total 1562500) to get 1 sec. */
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#define CONFIG_SYS_HZ 1562500
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/* valid baudrates */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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@ -320,17 +320,7 @@
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#define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */
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#ifdef CONFIG_TRAB_50MHZ
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#define CONFIG_SYS_HZ 1000
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/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
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/* it to wrap 100 times (total 1562500) to get 1 sec. */
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/* this should _really_ be calculated !! */
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#define CONFIG_SYS_HZ 1562500
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#else
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/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
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/* it to wrap 100 times (total 1039000) to get 1 sec. */
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/* this should _really_ be calculated !! */
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#define CONFIG_SYS_HZ 1039000
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#endif
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/* valid baudrates */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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