ddr: altera: Tweak DQS tracking enable handling

In the most unlikely case the DQS tracking was to be disabled,
make sure we do not errornously re-enable it. Note that DQS
tracking is enabled on all systems observed thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
This commit is contained in:
Marek Vasut 2016-04-05 23:41:56 +02:00
parent abaf83619c
commit bba7711092

View file

@ -3479,6 +3479,7 @@ grp_failed: /* A group failed, increment the counter. */
static int run_mem_calibrate(void) static int run_mem_calibrate(void)
{ {
int pass; int pass;
u32 ctrl_cfg;
debug("%s:%d\n", __func__, __LINE__); debug("%s:%d\n", __func__, __LINE__);
@ -3486,7 +3487,9 @@ static int run_mem_calibrate(void)
writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status); writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status);
/* Stop tracking manager. */ /* Stop tracking manager. */
clrbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK); ctrl_cfg = readl(&sdr_ctrl->ctrl_cfg);
writel(ctrl_cfg & ~SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK,
&sdr_ctrl->ctrl_cfg);
phy_mgr_initialize(); phy_mgr_initialize();
rw_mgr_mem_initialize(); rw_mgr_mem_initialize();
@ -3507,7 +3510,7 @@ static int run_mem_calibrate(void)
writel(0x2, &phy_mgr_cfg->mux_sel); writel(0x2, &phy_mgr_cfg->mux_sel);
/* Start tracking manager. */ /* Start tracking manager. */
setbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK); writel(ctrl_cfg, &sdr_ctrl->ctrl_cfg);
return pass; return pass;
} }