imx8m: ddrphy_utils: Add 3732 MT/s mode

Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This commit is contained in:
Marek Vasut 2022-02-26 04:37:42 +01:00 committed by Stefano Babic
parent 4ca42af8f5
commit b8a24e07b2

View file

@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate)
dram_pll_init(MHZ(1000)); dram_pll_init(MHZ(1000));
dram_disable_bypass(); dram_disable_bypass();
break; break;
case 3732:
dram_pll_init(MHZ(933));
dram_disable_bypass();
break;
case 3200: case 3200:
dram_pll_init(MHZ(800)); dram_pll_init(MHZ(800));
dram_disable_bypass(); dram_disable_bypass();