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imx8m: ddrphy_utils: Add 3732 MT/s mode
Add entry for 3732 MT/s mode of operation of the LPDDR4, in which case the DDR PLL has to be configured in 933 MHz mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
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@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate)
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dram_pll_init(MHZ(1000));
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dram_pll_init(MHZ(1000));
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dram_disable_bypass();
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dram_disable_bypass();
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break;
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break;
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case 3732:
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dram_pll_init(MHZ(933));
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dram_disable_bypass();
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break;
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case 3200:
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case 3200:
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dram_pll_init(MHZ(800));
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dram_pll_init(MHZ(800));
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dram_disable_bypass();
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dram_disable_bypass();
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