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arm, davinci: add SYSCFG1 base and register struct

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Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Heiko Schocher 2011-09-14 19:59:33 +00:00 • committed by Albert ARIBAUD
parent 41d272d1ef
commit b841c01d6a
1 changed files with 16 additions and 0 deletions
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16
arch/arm/include/asm/arch-davinci/hardware.h
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@ -142,6 +142,7 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01e22000 #define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE 0x01e22000
#define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01e20000 #define DAVINCI_EMAC_WRAPPER_RAM_BASE 0x01e20000
#define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01e24000 #define DAVINCI_MDIO_CNTRL_REGS_BASE 0x01e24000
#define DAVINCI_SYSCFG1_BASE 0x01e2c000
#define DAVINCI_MMC_SD0_BASE 0x01c40000 #define DAVINCI_MMC_SD0_BASE 0x01c40000
#define DAVINCI_MMC_SD1_BASE 0x01e1b000 #define DAVINCI_MMC_SD1_BASE 0x01e1b000
#define DAVINCI_TIMER2_BASE 0x01f0c000 #define DAVINCI_TIMER2_BASE 0x01f0c000
@ -448,6 +449,21 @@ struct davinci_syscfg_regs {
#define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20) #define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20)
#define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27) #define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27)
struct davinci_syscfg1_regs {
dv_reg vtpio_ctl;
dv_reg ddr_slew;
dv_reg deepsleep;
dv_reg pupd_ena;
dv_reg pupd_sel;
dv_reg rxactive;
dv_reg pwrdwn;
};
#define davinci_syscfg1_regs \
((struct davinci_syscfg1_regs *)DAVINCI_SYSCFG1_BASE)
#define DDR_SLEW_CMOSEN_BIT 4
/* Interrupt controller */ /* Interrupt controller */
struct davinci_aintc_regs { struct davinci_aintc_regs {
dv_reg revid; dv_reg revid;