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First set of u-boot-at91 features for the 2024.04 cycle

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Merge tag 'u-boot-at91-2024.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 features for the 2024.04 cycle:

This set includes some DT alignments and solves a compile issue for
custom nand defconfigs.
This commit is contained in:
Tom Rini 2024-01-31 10:44:33 -05:00
commit b6d8969bcb
2 changed files with 65 additions and 12 deletions
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74
arch/arm/dts/sama5d2.dtsi
View file

@ -34,6 +34,15 @@
#size-cells = <1>;
bootph-all;
nfc_sram: sram@100000 {
compatible = "mmio-sram";
no-memory-wc;
reg = <0x00100000 0x2400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00100000 0x2400>;
};
usb1: ohci@400000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00400000 0x100000>;
@ -50,6 +59,32 @@
status = "disabled";
};
ebi: ebi@10000000 {
compatible = "atmel,sama5d3-ebi";
#address-cells = <2>;
#size-cells = <1>;
atmel,smc = <&hsmc>;
reg = <0x10000000 0x10000000
0x60000000 0x30000000>;
ranges = <0x0 0x0 0x10000000 0x10000000
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x10000000>;
clocks = <&h32ck>;
status = "disabled";
nand_controller: nand-controller {
compatible = "atmel,sama5d3-nand-controller";
atmel,nfc-sram = <&nfc_sram>;
atmel,nfc-io = <&nfc_io>;
ecc-engine = <&pmecc>;
#address-cells = <2>;
#size-cells = <1>;
ranges;
status = "disabled";
};
};
sdmmc0: sdio-host@a0000000 {
compatible = "atmel,sama5d2-sdhci";
reg = <0xa0000000 0x300>;
@ -66,6 +101,11 @@
status = "disabled";
};
nfc_io: nfc-io@c0000000 {
compatible = "atmel,sama5d3-nfc-io", "syscon";
reg = <0xc0000000 0x8000000>;
};
apb {
compatible = "simple-bus";
#address-cells = <1>;
@ -79,7 +119,7 @@
status = "disabled";
};
pmc: pmc@f0014000 {
pmc: clock-controller@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;
#address-cells = <1>;
@ -657,6 +697,22 @@
};
};
hsmc: hsmc@f8014000 {
compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
reg = <0xf8014000 0x1000>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
clocks = <&hsmc_clk>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
pmecc: ecc-engine@f8014070 {
compatible = "atmel,sama5d2-pmecc";
reg = <0xf8014070 0x490>,
<0xf8014500 0x200>;
};
};
uart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x100>;
@ -698,13 +754,18 @@
status = "disabled";
};
rstc@f8048000 {
sfr: sfr@f8030000 {
compatible = "atmel,sama5d2-sfr", "syscon";
reg = <0xf8030000 0x98>;
};
reset_controller: reset-controller@f8048000 {
compatible = "atmel,sama5d3-rstc";
reg = <0xf8048000 0x10>;
clocks = <&clk32k>;
};
shdwc@f8048010 {
shutdown_controller: poweroff@f8048010 {
compatible = "atmel,sama5d2-shdwc";
reg = <0xf8048010 0x10>;
clocks = <&clk32k>;
@ -719,18 +780,13 @@
clocks = <&h32ck>;
};
watchdog@f8048040 {
watchdog: watchdog@f8048040 {
compatible = "atmel,sama5d4-wdt";
reg = <0xf8048040 0x10>;
clocks = <&clk32k>;
status = "disabled";
};
sfr: sfr@f8030000 {
compatible = "atmel,sama5d2-sfr", "syscon";
reg = <0xf8030000 0x98>;
};
sckc@f8048050 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xf8048050 0x4>;

3
drivers/mtd/nand/raw/atmel/pmecc.c
View file

@ -816,9 +816,6 @@ int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
}
EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
#define ATMEL_BASE_PMECC 0xffffe000
#define ATMEL_BASE_PMERRLOC 0xffffe600
static struct atmel_pmecc *
atmel_pmecc_create(struct udevice *dev,
const struct atmel_pmecc_caps *caps,