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mpc8569mds: fix some ddr settings

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Enable half drive strength, set RTT to 60Ohm and set write leveling override.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Haiying Wang 2010-09-29 13:31:36 -04:00 committed by Kumar Gala
parent 3aed550742
commit b6bde93090
1 changed files with 13 additions and 3 deletions
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16
board/freescale/mpc8569mds/ddr.c
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@ -77,8 +77,18 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->write_data_delay = 2;
/*
* Factors to consider for half-strength driver enable:
* - number of DIMMs installed
* Enable half drive strength
*/
popts->half_strength_driver_enable = 0;
popts->half_strength_driver_enable = 1;
/* Write leveling override */
popts->wrlvl_en = 1;
popts->wrlvl_override = 1;
popts->wrlvl_sample = 0xa;
popts->wrlvl_start = 0x4;
/* Rtt and Rtt_W override */
popts->rtt_override = 1;
popts->rtt_override_value = DDR3_RTT_60_OHM;
popts->rtt_wr_override_value = 0; /* Rtt_WR= dynamic ODT off */
}