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https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-arm
This commit is contained in:
commit
b5d58d8500
9 changed files with 45 additions and 6 deletions
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x23f00000
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@ -280,10 +280,17 @@ int board_eth_init(bd_t *bis)
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#endif
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
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PHYS_SDRAM_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x23f00000
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@ -377,10 +377,17 @@ int board_init(void)
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
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PHYS_SDRAM_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x73f00000
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@ -158,10 +158,17 @@ int board_init(void)
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
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PHYS_SDRAM_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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@ -45,6 +45,8 @@
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#define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_SYS_TEXT_BASE 0
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#define CONFIG_AT91FAMILY
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/* clocks */
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/* CKGR_MOR - enable main osc. */
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@ -201,6 +203,7 @@
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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@ -370,6 +373,10 @@
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#define CONFIG_SYS_MALLOC_LEN \
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ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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@ -44,6 +44,8 @@
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#define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_SYS_TEXT_BASE 0
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#define CONFIG_AT91FAMILY
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/* clocks */
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#define CONFIG_SYS_MOR_VAL \
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@ -212,6 +214,7 @@
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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@ -401,6 +404,10 @@
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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@ -39,6 +39,8 @@
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_TEXT_BASE 0x73f00000
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#define CONFIG_AT91FAMILY
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#define CONFIG_ARCH_CPU_INIT
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@ -79,6 +81,7 @@
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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@ -175,6 +178,10 @@
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
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0x1000)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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