Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-16 14:08:45 +00:00
Code Issues Projects Releases Packages Wiki Activity

Merge branch 'master' of git://git.denx.de/u-boot-arm

Browse source
This commit is contained in:
Wolfgang Denk 2010-12-16 22:49:16 +01:00
commit b5d58d8500
9 changed files with 45 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
board/ronetix/pm9261/config.mk
View file

@ -1 +0,0 @@
CONFIG_SYS_TEXT_BASE = 0x23f00000

9
board/ronetix/pm9261/pm9261.c
View file

@ -280,10 +280,17 @@ int board_eth_init(bd_t *bis)
#endif #endif
int dram_init(void) int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
PHYS_SDRAM_SIZE);
return 0;
}
void dram_init_banksize(void)
{ {
gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
} }
#ifdef CONFIG_RESET_PHY_R #ifdef CONFIG_RESET_PHY_R

1
board/ronetix/pm9263/config.mk
View file

@ -1 +0,0 @@
CONFIG_SYS_TEXT_BASE = 0x23f00000

9
board/ronetix/pm9263/pm9263.c
View file

@ -377,10 +377,17 @@ int board_init(void)
} }
int dram_init(void) int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
PHYS_SDRAM_SIZE);
return 0;
}
void dram_init_banksize(void)
{ {
gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
} }
#ifdef CONFIG_RESET_PHY_R #ifdef CONFIG_RESET_PHY_R

1
board/ronetix/pm9g45/config.mk
View file

@ -1 +0,0 @@
CONFIG_SYS_TEXT_BASE = 0x73f00000

9
board/ronetix/pm9g45/pm9g45.c
View file

@ -158,10 +158,17 @@ int board_init(void)
} }
int dram_init(void) int dram_init(void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
PHYS_SDRAM_SIZE);
return 0;
}
void dram_init_banksize(void)
{ {
gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
} }
#ifdef CONFIG_RESET_PHY_R #ifdef CONFIG_RESET_PHY_R

7
include/configs/pm9261.h
View file

@ -45,6 +45,8 @@
#define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */
#define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_SYS_TEXT_BASE 0
#define CONFIG_AT91FAMILY
/* clocks */ /* clocks */
/* CKGR_MOR - enable main osc. */ /* CKGR_MOR - enable main osc. */
@ -201,6 +203,7 @@
#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_IMLS
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_PING 1 #define CONFIG_CMD_PING 1
#define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_DHCP 1
#define CONFIG_CMD_NAND 1 #define CONFIG_CMD_NAND 1
@ -370,6 +373,10 @@
#define CONFIG_SYS_MALLOC_LEN \ #define CONFIG_SYS_MALLOC_LEN \
ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
#ifdef CONFIG_USE_IRQ #ifdef CONFIG_USE_IRQ

7
include/configs/pm9263.h
View file

@ -44,6 +44,8 @@
#define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */ #define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */
#define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define CONFIG_SYS_TEXT_BASE 0
#define CONFIG_AT91FAMILY
/* clocks */ /* clocks */
#define CONFIG_SYS_MOR_VAL \ #define CONFIG_SYS_MOR_VAL \
@ -212,6 +214,7 @@
#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_IMLS
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_PING 1 #define CONFIG_CMD_PING 1
#define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_DHCP 1
#define CONFIG_CMD_NAND 1 #define CONFIG_CMD_NAND 1
@ -401,6 +404,10 @@
*/ */
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
#ifdef CONFIG_USE_IRQ #ifdef CONFIG_USE_IRQ

7
include/configs/pm9g45.h
View file

@ -39,6 +39,8 @@
/* ARM asynchronous clock */ /* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x73f00000
#define CONFIG_AT91FAMILY
#define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_CPU_INIT
@ -79,6 +81,7 @@
#undef CONFIG_CMD_FPGA #undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMLS #undef CONFIG_CMD_IMLS
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_PING 1 #define CONFIG_CMD_PING 1
#define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_DHCP 1
#define CONFIG_CMD_NAND 1 #define CONFIG_CMD_NAND 1
@ -175,6 +178,10 @@
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
0x1000) 0x1000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_STACKSIZE (32*1024) /* regular stack */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ #ifdef CONFIG_USE_IRQ