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pci: fix address range check in __pci_hose_phys_to_bus()

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The address range check may overflow if the memory region is located at
the top of the 32-bit address space. This can e.g. be seen on TK1 if
using the E1000 gigabit Ethernet driver where start and size are both
0x80000000 leading to the following messages:

Apalis TK1 # tftpboot $loadaddr test_file
Using e1000#0 device
TFTP from server 192.168.10.1; our IP address is 192.168.10.2
Filename 'test_file'.
Load address: 0x80408000
Loading: pci_hose_phys_to_bus: invalid physical address

This patch fixes this by changing the order of the addition vs.
subtraction in the range check just like already done in
__pci_hose_bus_to_phys().

Reported-by: Ivan Mercier <ivan.mercier@nexvision.fr>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Marcel Ziswiler 2015-11-18 15:05:06 +01:00 committed by Tom Rini
parent cfdaf4caa2
commit b4bd655493
1 changed files with 1 additions and 1 deletions
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2
drivers/pci/pci_common.c
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@ -268,7 +268,7 @@ int __pci_hose_phys_to_bus(struct pci_controller *hose,
bus_addr = phys_addr - res->phys_start + res->bus_start;
if (bus_addr >= res->bus_start &&
bus_addr < res->bus_start + res->size) {
(bus_addr - res->bus_start) < res->size) {
*ba = bus_addr;
return 0;
}