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arm: provide a PCS-compliant setjmp implementation
The previous setjmp-implementation (as a static inline function that contained an 'asm volatile' sequence) was extremely fragile: (some versions of) GCC optimised the set of registers. One critical example was the removal of 'r9' from the clobber list, if -ffixed-reg9 was supplied. To increase robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
This commit is contained in:
Philipp Tomsich
parent
ff143d5556
commit
b4806d6f1f
4 changed files with 98 additions and 81 deletions
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@ -1,6 +1,6 @@
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/*
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* (C) Copyright 2016
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* Alexander Graf <agraf@suse.de>
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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* (C) Copyright 2016 Alexander Graf <agraf@suse.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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@ -8,89 +8,21 @@
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#ifndef _SETJMP_H_
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#define _SETJMP_H_ 1
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/*
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* This really should be opaque, but the EFI implementation wrongly
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* assumes that a 'struct jmp_buf_data' is defined.
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*/
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struct jmp_buf_data {
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ulong target;
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ulong regs[5];
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int ret;
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#if defined(__aarch64__)
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u64 regs[13];
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#else
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u32 regs[10]; /* r4-r9, sl, fp, sp, lr */
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#endif
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};
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typedef struct jmp_buf_data jmp_buf[1];
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static inline int setjmp(jmp_buf jmp)
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{
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jmp->ret = 0;
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#ifdef CONFIG_ARM64
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asm volatile(
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"adr x1, jmp_target\n"
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"str x1, %0\n"
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"stp x26, x27, %1\n"
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"stp x28, x29, %2\n"
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"mov x1, sp\n"
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"str x1, %3\n"
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"jmp_target: "
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: "=m" (jmp->target), "=m" (jmp->regs[0]),
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"=m" (jmp->regs[2]), "=m" (jmp->regs[4])
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:
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: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
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"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
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"x16", "x17", "x18", "x19", "x20", "x21", "x22",
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"x23", "x24", "x25", /* x26, x27, x28, x29, sp */
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"x30", "cc", "memory");
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#else
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asm volatile(
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#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
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".align 2\n"
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"adr r0, jmp_target\n"
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"add r0, r0, $1\n"
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#else
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"adr r0, jmp_target\n"
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#endif
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"mov r1, %0\n"
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"mov r2, sp\n"
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"stm r1!, {r0, r2, r4, r5, r6, r7}\n"
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".align 2\n"
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"jmp_target: \n"
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:
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: "l" (&jmp->target)
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: "r0", "r1", "r2", "r3", /* "r4", "r5", "r6", "r7", */
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"r8", "r9", "r10", "r11", /* sp, */ "ip", "lr",
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"cc", "memory");
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#endif
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return jmp->ret;
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}
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static inline __noreturn void longjmp(jmp_buf jmp, int ret)
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{
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jmp->ret = ret;
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#ifdef CONFIG_ARM64
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asm volatile(
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"ldr x0, %0\n"
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"ldr x1, %3\n"
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"mov sp, x1\n"
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"ldp x26, x27, %1\n"
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"ldp x28, x25, %2\n"
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"mov x29, x25\n"
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"br x0\n"
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:
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: "m" (jmp->target), "m" (jmp->regs[0]), "m" (jmp->regs[2]),
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"m" (jmp->regs[4])
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: "x0", "x1", "x25", "x26", "x27", "x28");
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#else
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asm volatile(
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"mov r1, %0\n"
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"ldm r1!, {r0, r2, r4, r5, r6, r7}\n"
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"mov sp, r2\n"
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"bx r0\n"
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:
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: "l" (&jmp->target)
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: "r1");
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#endif
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while (1) { }
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}
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int setjmp(jmp_buf jmp);
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void longjmp(jmp_buf jmp, int ret);
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#endif /* _SETJMP_H_ */
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@ -17,6 +17,12 @@ else
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obj-y += vectors.o crt0.o
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endif
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ifdef CONFIG_ARM64
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obj-y += setjmp_aarch64.o
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else
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obj-y += setjmp.o
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endif
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ifndef CONFIG_SPL_BUILD
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ifdef CONFIG_ARM64
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obj-y += relocate_64.o
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37
arch/arm/lib/setjmp.S
Normal file
37
arch/arm/lib/setjmp.S
Normal file
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@ -0,0 +1,37 @@
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/*
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* (C) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/assembler.h>
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#include <linux/linkage.h>
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.pushsection .text.setjmp, "ax"
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ENTRY(setjmp)
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/*
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* A subroutine must preserve the contents of the registers
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* r4-r8, r10, r11 (v1-v5, v7 and v8) and SP (and r9 in PCS
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* variants that designate r9 as v6).
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*/
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mov ip, sp
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stm a1, {v1-v8, ip, lr}
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mov a1, #0
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bx lr
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ENDPROC(setjmp)
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.popsection
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.pushsection .text.longjmp, "ax"
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ENTRY(longjmp)
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ldm a1, {v1-v8, ip, lr}
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mov sp, ip
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mov a1, a2
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/* If we were passed a return value of zero, return one instead */
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cmp a1, #0
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bne 1f
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mov a1, #1
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1:
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bx lr
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ENDPROC(longjmp)
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.popsection
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42
arch/arm/lib/setjmp_aarch64.S
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42
arch/arm/lib/setjmp_aarch64.S
Normal file
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@ -0,0 +1,42 @@
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/*
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* (C) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/macro.h>
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#include <linux/linkage.h>
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.pushsection .text.setjmp, "ax"
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ENTRY(setjmp)
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/* Preserve all callee-saved registers and the SP */
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stp x19, x20, [x0,#0]
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stp x21, x22, [x0,#16]
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stp x23, x24, [x0,#32]
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stp x25, x26, [x0,#48]
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stp x27, x28, [x0,#64]
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stp x29, x30, [x0,#80]
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mov x2, sp
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str x2, [x0, #96]
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mov x0, #0
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ret
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ENDPROC(setjmp)
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.popsection
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.pushsection .text.longjmp, "ax"
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ENTRY(longjmp)
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ldp x19, x20, [x0,#0]
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ldp x21, x22, [x0,#16]
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ldp x23, x24, [x0,#32]
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ldp x25, x26, [x0,#48]
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ldp x27, x28, [x0,#64]
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ldp x29, x30, [x0,#80]
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ldr x2, [x0,#96]
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mov sp, x2
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/* Move the return value in place, but return 1 if passed 0. */
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adds x0, xzr, x1
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csinc x0, x0, xzr, ne
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ret
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ENDPROC(longjmp)
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.popsection
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