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powerpc/srio: Update the SRIO LIODN registers and ID table macro
For some PowerPC platforms, LIODN registers for SRIO ports are in SRIO register address space. So the ccsr_rio structure should be updated for those LIODN registers. In addition, add a new macro "SET_SRIO_LIODN_BASE" to create the SRIO LIODN ID table based on the SRIO LIODN register address. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
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2 changed files with 23 additions and 0 deletions
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@ -29,6 +29,13 @@ struct srio_liodn_id_table {
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+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
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}
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#define SET_SRIO_LIODN_BASE(port, id_a) \
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{ .id = { id_a }, .num_ids = 1, .portid = port, \
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.reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
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+ (port - 1) * 0x200 \
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+ CONFIG_SYS_FSL_SRIO_ADDR, \
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}
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struct liodn_id_table {
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const char * compat;
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u32 id[2];
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@ -1544,6 +1544,18 @@ struct rio_pw {
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};
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#endif
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#ifdef CONFIG_SYS_FSL_SRIO_LIODN
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struct rio_liodn {
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u32 plbr;
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u8 res0[28];
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u32 plaor;
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u8 res1[12];
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u32 pludr;
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u32 plldr;
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u8 res2[456];
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};
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#endif
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/* RapidIO Registers */
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struct ccsr_rio {
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struct rio_arch arch;
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@ -1566,6 +1578,10 @@ struct ccsr_rio {
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u8 res7[100];
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struct rio_pw pw;
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#endif
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#ifdef CONFIG_SYS_FSL_SRIO_LIODN
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u8 res5[8192];
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struct rio_liodn liodn[CONFIG_SYS_FSL_SRIO_MAX_PORTS];
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#endif
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};
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#endif
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