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nvme: fix for big endian systems
writel() and co. already include the endian swap; doing the swap twice is, er, unhelpful. Tested on a P4080DS, which boots perfectly fine off NVMe with this. Signed-off-by: David Lamparter <equinox@diac24.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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1 changed files with 4 additions and 4 deletions
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@ -157,7 +157,7 @@ static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index)
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invalidate_dcache_range(start, stop);
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return le16_to_cpu(readw(&(nvmeq->cqes[index].status)));
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return readw(&(nvmeq->cqes[index].status));
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}
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/**
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@ -221,7 +221,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
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}
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if (result)
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*result = le32_to_cpu(readl(&(nvmeq->cqes[head].result)));
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*result = readl(&(nvmeq->cqes[head].result));
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if (++head == nvmeq->q_depth) {
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head = 0;
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@ -304,7 +304,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev)
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{
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dev->ctrl_config &= ~NVME_CC_SHN_MASK;
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dev->ctrl_config |= NVME_CC_ENABLE;
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writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
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writel(dev->ctrl_config, &dev->bar->cc);
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return nvme_wait_ready(dev, true);
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}
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@ -313,7 +313,7 @@ static int nvme_disable_ctrl(struct nvme_dev *dev)
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{
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dev->ctrl_config &= ~NVME_CC_SHN_MASK;
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dev->ctrl_config &= ~NVME_CC_ENABLE;
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writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
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writel(dev->ctrl_config, &dev->bar->cc);
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return nvme_wait_ready(dev, false);
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}
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