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sunxi: SPI: fix pinmuxing for Allwinner H6 SoCs

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The driver for SPI0 on Allwinner H6 SoCs did not use the correct define
SUN50I_GPC_SPI0 for the pin function, but one for a different Allwinner
SoC series.

Fix the conditionals to use the correct define for H6 SoCs. This matches
the conditional logic in the SPL spi driver.

Tested by probing the spi-flash on a pine64_h64-model-b board with
adapted device-tree (disable mmc2, enable spi0).

Signed-off-by: Daniel Wagenknecht <dwagenk@mailbox.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Daniel Wagenknecht 2021-12-16 20:42:10 +01:00 committed by Andre Przywara
parent 98a90b2730
commit b106a14e2f
1 changed files with 2 additions and 1 deletions
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3
drivers/spi/spi-sunxi.c
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@ -249,7 +249,8 @@ static int sun4i_spi_parse_pins(struct udevice *dev)
if (pin < 0) if (pin < 0)
break; break;
if (IS_ENABLED(CONFIG_MACH_SUN50I)) if (IS_ENABLED(CONFIG_MACH_SUN50I) ||
IS_ENABLED(CONFIG_SUN50I_GEN_H6))
sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0); sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0);
else else
sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0); sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0);