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arm: socfpga: fix Gen5 enable of EMAC via FPGA

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An earlier conversion from struct to defines introduced two errors, both
related to setup of EMAC routed via the FPGA. One of the offsets was
incorrect, and the EMAC0/EMAC1 were swapped.

The effect of this was rather odd: both ports could operate at gigabit,
but one of them would fail to transmit when operating at 100Mbit.

Fixes: db5741f7a8 ("arm: socfpga: Convert system manager from struct to defines")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Ralph Siemsen 2020-09-29 14:52:05 -04:00 committed by Ley Foon Tan
parent 7ec87e4192
commit b0b08ce0b7
1 changed files with 2 additions and 2 deletions
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4
arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
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@ -26,9 +26,9 @@ void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len);
#define SYSMGR_GEN5_ECCGRP_OCRAM 0x144
#define SYSMGR_GEN5_EMACIO 0x400
#define SYSMGR_GEN5_NAND_USEFPGA 0x6f0
#define SYSMGR_GEN5_RGMII0_USEFPGA 0x6f8
#define SYSMGR_GEN5_RGMII1_USEFPGA 0x6f8
#define SYSMGR_GEN5_SDMMC_USEFPGA 0x708
#define SYSMGR_GEN5_RGMII1_USEFPGA 0x704
#define SYSMGR_GEN5_RGMII0_USEFPGA 0x714
#define SYSMGR_GEN5_SPIM1_USEFPGA 0x730
#define SYSMGR_GEN5_SPIM0_USEFPGA 0x738