rockchip: px5: enable spl-fifo-mode for emmc for px5-evb

We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Andy Yan 2019-11-26 21:15:39 +08:00 committed by Kever Yang
parent 081a51c937
commit afe18f205e

View file

@ -58,6 +58,8 @@
}; };
&emmc { &emmc {
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
u-boot,dm-pre-reloc; u-boot,dm-pre-reloc;
}; };