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rockchip: px5: enable spl-fifo-mode for emmc for px5-evb
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@ -58,6 +58,8 @@
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};
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&emmc {
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&emmc {
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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u-boot,dm-pre-reloc;
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u-boot,dm-pre-reloc;
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};
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};
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