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spi: zynqmp_qspi: Code alignment
Few lines are extented to next line though they can fit in 80 character limit, align them to single line. No functional change. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20220825125906.11581-6-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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a3d4bfb427
commit
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1 changed files with 6 additions and 12 deletions
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@ -434,8 +434,7 @@ static int zynqmp_qspi_set_mode(struct udevice *bus, uint mode)
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debug("%s\n", __func__);
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/* Set the SPI Clock phase and polarities */
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confr = readl(®s->confr);
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confr &= ~(GQSPI_CONFIG_CPHA_MASK |
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GQSPI_CONFIG_CPOL_MASK);
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confr &= ~(GQSPI_CONFIG_CPHA_MASK | GQSPI_CONFIG_CPOL_MASK);
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if (mode & SPI_CPHA)
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confr |= GQSPI_CONFIG_CPHA_MASK;
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@ -579,8 +578,7 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv)
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gen_fifo_cmd = zynqmp_qspi_bus_select(priv);
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gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth);
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gen_fifo_cmd |= GQSPI_GFIFO_TX |
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GQSPI_GFIFO_DATA_XFR_MASK;
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gen_fifo_cmd |= GQSPI_GFIFO_TX | GQSPI_GFIFO_DATA_XFR_MASK;
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while (priv->len) {
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len = zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd);
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@ -589,11 +587,9 @@ static int zynqmp_qspi_genfifo_fill_tx(struct zynqmp_qspi_priv *priv)
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debug("GFIFO_CMD_TX:0x%x\n", gen_fifo_cmd);
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if (gen_fifo_cmd & GQSPI_GFIFO_EXP_MASK)
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ret = zynqmp_qspi_fill_tx_fifo(priv,
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1 << len);
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ret = zynqmp_qspi_fill_tx_fifo(priv, 1 << len);
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else
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ret = zynqmp_qspi_fill_tx_fifo(priv,
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len);
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ret = zynqmp_qspi_fill_tx_fifo(priv, len);
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if (ret)
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return ret;
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@ -726,8 +722,7 @@ static int zynqmp_qspi_genfifo_fill_rx(struct zynqmp_qspi_priv *priv)
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gen_fifo_cmd = zynqmp_qspi_bus_select(priv);
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gen_fifo_cmd |= zynqmp_qspi_genfifo_mode(priv->op->data.buswidth);
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gen_fifo_cmd |= GQSPI_GFIFO_RX |
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GQSPI_GFIFO_DATA_XFR_MASK;
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gen_fifo_cmd |= GQSPI_GFIFO_RX | GQSPI_GFIFO_DATA_XFR_MASK;
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/*
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* Check if receive buffer is aligned to 4 byte and length
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@ -742,8 +737,7 @@ static int zynqmp_qspi_genfifo_fill_rx(struct zynqmp_qspi_priv *priv)
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return zynqmp_qspi_start_dma(priv, gen_fifo_cmd, buf);
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}
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ALLOC_CACHE_ALIGN_BUFFER(u8, tmp, roundup(priv->len,
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GQSPI_DMA_ALIGN));
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ALLOC_CACHE_ALIGN_BUFFER(u8, tmp, roundup(priv->len, GQSPI_DMA_ALIGN));
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buf = (u32 *)tmp;
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return zynqmp_qspi_start_dma(priv, gen_fifo_cmd, buf);
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}
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