mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 22:20:45 +00:00
EfikaSB: Add preliminary EfikaSB support
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Marek Vasut
Albert ARIBAUD
parent
0ef4fc533a
commit
af708cbaae
2 changed files with 101 additions and 23 deletions
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@ -62,10 +62,13 @@ void efikamx_toggle_led(uint32_t mask);
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#define EFIKAMX_BOARD_REV_13 0x3
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#define EFIKAMX_BOARD_REV_14 0x4
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#define EFIKASB_BOARD_REV_13 0x1
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#define EFIKASB_BOARD_REV_20 0x2
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/*
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* Board identification
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*/
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u32 get_efika_rev(void)
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u32 get_efikamx_rev(void)
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{
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u32 rev = 0;
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/*
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@ -97,6 +100,31 @@ u32 get_efika_rev(void)
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return (~rev & 0x7) + 1;
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}
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inline u32 get_efikasb_rev(void)
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{
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u32 rev = 0;
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mxc_request_iomux(MX51_PIN_EIM_CS3, IOMUX_CONFIG_GPIO);
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mxc_iomux_set_pad(MX51_PIN_EIM_CS3, PAD_CTL_100K_PU);
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gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_CS3));
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rev |= (!!gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS3))) << 0;
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mxc_request_iomux(MX51_PIN_EIM_CS4, IOMUX_CONFIG_GPIO);
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mxc_iomux_set_pad(MX51_PIN_EIM_CS4, PAD_CTL_100K_PU);
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gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_EIM_CS4));
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rev |= (!!gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS4))) << 1;
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return rev;
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}
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inline uint32_t get_efika_rev(void)
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{
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if (machine_is_efikamx())
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return get_efikamx_rev();
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else
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return get_efikasb_rev();
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}
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u32 get_board_rev(void)
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{
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return get_cpu_rev() | (get_efika_rev() << 8);
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@ -268,25 +296,36 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC2_BASE_ADDR, 1},
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};
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static inline uint32_t efika_mmc_cd(void)
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{
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if (machine_is_efikamx())
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return MX51_PIN_GPIO1_0;
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else
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return MX51_PIN_EIM_CS2;
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}
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int board_mmc_getcd(u8 *absent, struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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uint32_t cd = efika_mmc_cd();
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0));
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*absent = gpio_get_value(IOMUX_TO_GPIO(cd));
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else
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*absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8));
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return 0;
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}
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int board_mmc_init(bd_t *bis)
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{
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int ret;
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uint32_t cd = efika_mmc_cd();
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/* SDHC1 is used on all revisions, setup control pins first */
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mxc_request_iomux(MX51_PIN_GPIO1_0,
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mxc_request_iomux(cd,
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IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
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mxc_iomux_set_pad(MX51_PIN_GPIO1_0,
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mxc_iomux_set_pad(cd,
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PAD_CTL_DRV_HIGH | PAD_CTL_HYS_ENABLE |
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PAD_CTL_PUE_KEEPER | PAD_CTL_100K_PU |
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PAD_CTL_ODE_OPENDRAIN_NONE |
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@ -298,11 +337,12 @@ int board_mmc_init(bd_t *bis)
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PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE |
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PAD_CTL_SRE_FAST);
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gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_0));
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gpio_direction_input(IOMUX_TO_GPIO(cd));
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gpio_direction_input(IOMUX_TO_GPIO(MX51_PIN_GPIO1_1));
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/* Internal SDHC1 IOMUX + SDHC2 IOMUX on old boards */
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if (get_efika_rev() < EFIKAMX_BOARD_REV_12) {
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if (machine_is_efikasb() || (machine_is_efikamx() &&
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(get_efika_rev() < EFIKAMX_BOARD_REV_12))) {
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/* SDHC1 IOMUX */
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mxc_request_iomux(MX51_PIN_SD1_CMD,
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IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
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@ -414,6 +454,7 @@ int board_mmc_init(bd_t *bis)
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ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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}
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return ret;
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}
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#endif
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@ -493,27 +534,44 @@ static inline void setup_iomux_ata(void) { }
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*/
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void setup_iomux_led(void)
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{
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/* Blue LED */
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mxc_request_iomux(MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0);
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if (machine_is_efikamx()) {
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/* Blue LED */
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mxc_request_iomux(MX51_PIN_CSI1_D9, IOMUX_CONFIG_ALT3);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9), 0);
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/* Green LED */
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mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), 0);
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/* Green LED */
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mxc_request_iomux(MX51_PIN_CSI1_VSYNC, IOMUX_CONFIG_ALT3);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC), 0);
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/* Red LED */
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mxc_request_iomux(MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT3);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), 0);
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/* Red LED */
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mxc_request_iomux(MX51_PIN_CSI1_HSYNC, IOMUX_CONFIG_ALT3);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC), 0);
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} else {
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/* CAPS-LOCK LED */
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mxc_request_iomux(MX51_PIN_EIM_CS0, IOMUX_CONFIG_GPIO);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_CS0), 0);
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/* ALARM-LED LED */
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mxc_request_iomux(MX51_PIN_GPIO1_3, IOMUX_CONFIG_GPIO);
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gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3), 0);
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}
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}
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void efikamx_toggle_led(uint32_t mask)
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{
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9),
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mask & EFIKAMX_LED_BLUE);
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC),
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mask & EFIKAMX_LED_GREEN);
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC),
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mask & EFIKAMX_LED_RED);
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if (machine_is_efikamx()) {
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_D9),
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mask & EFIKAMX_LED_BLUE);
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_VSYNC),
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mask & EFIKAMX_LED_GREEN);
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_CSI1_HSYNC),
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mask & EFIKAMX_LED_RED);
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} else {
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_CS0),
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mask & EFIKAMX_LED_BLUE);
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gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_3),
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!(mask & EFIKAMX_LED_GREEN));
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}
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}
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/*
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@ -607,7 +665,6 @@ int board_early_init_f(void)
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int board_init(void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_MX51_EFIKAMX;
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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@ -629,7 +686,24 @@ int board_late_init(void)
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int checkboard(void)
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{
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puts("Board: Efika MX\n");
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u32 rev = get_efika_rev();
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if (machine_is_efikamx()) {
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printf("Board: Efika MX, rev1.%i\n", rev & 0xf);
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return 0;
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} else {
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switch (rev) {
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case EFIKASB_BOARD_REV_13:
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printf("Board: Efika SB rev1.3\n");
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break;
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case EFIKASB_BOARD_REV_20:
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printf("Board: Efika SB rev2.0\n");
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break;
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default:
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printf("Board: Efika SB, rev Unknown\n");
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break;
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}
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}
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return 0;
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}
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@ -31,6 +31,10 @@
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*/
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/* An i.MX51 CPU */
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#define CONFIG_MX51
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#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
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#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_MX5_HCLK 24000000
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