microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com
This commit is contained in:
Michal Simek 2022-06-24 14:16:32 +02:00
parent a36d86720f
commit aec051d813
3 changed files with 1 additions and 219 deletions

View file

@ -74,7 +74,6 @@ config M68K
config MICROBLAZE
bool "MicroBlaze architecture"
select SUPPORT_OF_CONTROL
imply CMD_IRQ
imply CMD_TIMER
imply SPL_REGMAP if SPL
imply SPL_TIMER if SPL

View file

@ -8,17 +8,8 @@
*/
#include <common.h>
#include <command.h>
#include <fdtdec.h>
#include <irq_func.h>
#include <log.h>
#include <malloc.h>
#include <asm/global_data.h>
#include <asm/microblaze_intc.h>
#include <asm/asm.h>
DECLARE_GLOBAL_DATA_PTR;
void enable_interrupts(void)
{
debug("Enable interrupts for the whole CPU\n");
@ -34,183 +25,12 @@ int disable_interrupts(void)
return (msr & 0x2) != 0;
}
static struct irq_action *vecs;
static u32 irq_no;
/* mapping structure to interrupt controller */
microblaze_intc_t *intc;
/* default handler */
static void def_hdlr(void)
{
puts("def_hdlr\n");
}
static void enable_one_interrupt(int irq)
{
int mask;
int offset = 1;
offset <<= irq;
mask = intc->ier;
intc->ier = (mask | offset);
debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
intc->ier);
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
}
static void disable_one_interrupt(int irq)
{
int mask;
int offset = 1;
offset <<= irq;
mask = intc->ier;
intc->ier = (mask & ~offset);
debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
intc->ier);
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
}
int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
{
struct irq_action *act;
/* irq out of range */
if ((irq < 0) || (irq > irq_no)) {
puts("IRQ out of range\n");
return -1;
}
act = &vecs[irq];
if (hdlr) { /* enable */
act->handler = hdlr;
act->arg = arg;
act->count = 0;
enable_one_interrupt(irq);
return 0;
}
/* Disable */
act->handler = (interrupt_handler_t *)def_hdlr;
act->arg = (void *)irq;
disable_one_interrupt(irq);
return 1;
}
/* initialization interrupt controller - hardware */
static void intc_init(void)
{
intc->mer = 0;
intc->ier = 0;
intc->iar = 0xFFFFFFFF;
/* XIntc_Start - hw_interrupt enable and all interrupt enable */
intc->mer = 0x3;
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
}
int interrupt_init(void)
{
int i;
const void *blob = gd->fdt_blob;
int node = 0;
debug("INTC: Initialization\n");
node = fdt_node_offset_by_compatible(blob, node,
"xlnx,xps-intc-1.00.a");
if (node != -1) {
fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
if (base == FDT_ADDR_T_NONE)
return -1;
debug("INTC: Base addr %lx\n", base);
intc = (microblaze_intc_t *)base;
irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
debug("INTC: IRQ NO %x\n", irq_no);
} else {
return node;
}
if (irq_no) {
vecs = calloc(1, sizeof(struct irq_action) * irq_no);
if (vecs == NULL) {
puts("Interrupt vector allocation failed\n");
return -1;
}
/* initialize irq list */
for (i = 0; i < irq_no; i++) {
vecs[i].handler = (interrupt_handler_t *)def_hdlr;
vecs[i].arg = (void *)i;
vecs[i].count = 0;
}
/* initialize intc controller */
intc_init();
enable_interrupts();
} else {
puts("Undefined interrupt controller\n");
}
return 0;
}
void interrupt_handler(void)
{
int irqs = intc->ivr; /* find active interrupt */
int mask = 1;
int value;
struct irq_action *act = vecs + irqs;
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
#ifdef DEBUG
R14(value);
#endif
debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
(u32)act->handler, act->count, (u32)act->arg);
act->handler(act->arg);
act->count++;
intc->iar = mask << irqs;
debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
intc->ier, intc->iar, intc->mer);
#ifdef DEBUG
R14(value);
#endif
debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
panic("Interrupt occurred\n");
}
#if defined(CONFIG_CMD_IRQ)
int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[])
{
int i;
struct irq_action *act = vecs;
if (irq_no) {
puts("\nInterrupt-Information:\n\n"
"Nr Routine Arg Count\n"
"-----------------------------\n");
for (i = 0; i < irq_no; i++) {
if (act->handler != (interrupt_handler_t *)def_hdlr) {
printf("%02d %08x %08x %d\n", i,
(int)act->handler, (int)act->arg,
act->count);
}
act++;
}
puts("\n");
} else {
puts("Undefined interrupt controller\n");
}
return 0;
}
#endif

View file

@ -1,37 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2007 Michal Simek
*
* Michal SIMEK <monstr@monstr.cz>
*/
#include <irq_func.h>
typedef volatile struct microblaze_intc_t {
int isr; /* interrupt status register */
int ipr; /* interrupt pending register */
int ier; /* interrupt enable register */
int iar; /* interrupt acknowledge register */
int sie; /* set interrupt enable bits */
int cie; /* clear interrupt enable bits */
int ivr; /* interrupt vector register */
int mer; /* master enable register */
} microblaze_intc_t;
struct irq_action {
interrupt_handler_t *handler; /* pointer to interrupt rutine */
void *arg;
int count; /* number of interrupt */
};
/**
* Register and unregister interrupt handler rutines
*
* @param irq IRQ number
* @param hdlr Interrupt handler rutine
* @param arg Pointer to argument which is passed to int. handler rutine
* Return: 0 if registration pass, 1 if unregistration pass,
* or an error code < 0 otherwise
*/
int install_interrupt_handler(int irq, interrupt_handler_t *hdlr,
void *arg);