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ARM: dts: sama7g5ek: fix TXC pin configuration

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TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
This commit is contained in:
Nicolas Ferre 2020-10-30 18:33:14 +01:00 committed by Eugen Hristev
parent 05176cd08f
commit aeaef07c51
1 changed files with 6 additions and 2 deletions
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8
arch/arm/dts/sama7g5ek.dts
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@ -90,7 +90,7 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0_default>;
pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>;
phy-mode = "rgmii-id";
status = "okay";
@ -173,7 +173,6 @@
<PIN_PA28__G0_RX2>,
<PIN_PA29__G0_RX3>,
<PIN_PA15__G0_TXEN>,
<PIN_PA24__G0_TXCK>,
<PIN_PA30__G0_RXCK>,
<PIN_PA18__G0_RXDV>,
<PIN_PA22__G0_MDC>,
@ -182,6 +181,11 @@
bias-disable;
};
pinctrl_gmac0_txc_default: gmac0_txc_default {
pinmux = <PIN_PA24__G0_TXCK>;
bias-pull-up;
};
pinctrl_gmac1_default: gmac1_default {
pinmux = <PIN_PD30__G1_TXCK>,
<PIN_PD22__G1_TX0>,