- kirkwood: pogo_v4 & nsa310s: Add distro boot (Tony)
- kirkwood: add DM timer support and use it on lsxl boards (Michael)
- kirkwood: convert the Buffalo Linkstation LS-CHLv2 and XHL boards
  to DM (Michael)
- mvebu: turris_mox/omnia: misc improments (Pali)
- mvebu: mbus: Fix mbus driver to work also after U-Boot relocation (Pali)
This commit is contained in:
Tom Rini 2022-08-23 15:44:54 -04:00
commit aea087a665
33 changed files with 521 additions and 331 deletions

View file

@ -0,0 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+
&eth0 {
status = "disabled";
};
&hdd_power {
/delete-property/ regulator-always-on;
};
&usb_power {
/delete-property/ regulator-always-on;
};

View file

@ -0,0 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+
&eth0 {
status = "disabled";
};
&hdd_power {
/delete-property/ regulator-always-on;
};
&usb_power {
/delete-property/ regulator-always-on;
};

View file

@ -45,6 +45,8 @@ config TARGET_LSXL
bool "lsxl Board"
select FEROCEON_88FR131
select KW88F6281
select BOARD_EARLY_INIT_R
select MISC_INIT_R
config TARGET_POGO_E02
bool "pogo_e02 Board"

View file

@ -51,8 +51,10 @@
#endif /* CONFIG_IDE */
/* Use common timer */
#ifndef CONFIG_TIMER
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TCLK
#endif
#endif /* _KW_CONFIG_H */

View file

@ -144,9 +144,6 @@ struct kwgpio_registers {
u32 irq_level;
};
/* Needed for dynamic (board-specific) mbus configuration */
extern struct mvebu_mbus_state mbus_state;
/*
* functions
*/

View file

@ -15,6 +15,7 @@
#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
/* TCLK Core Clock definition */
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(21)) ? \
166666667 : 200000000)
#endif /* _ASM_ARCH_KW88F6281_H */

View file

@ -62,6 +62,8 @@
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
#define CONFIG_SAR_REG (KW_MPP_BASE + 0x0030)
#if defined (CONFIG_KW88F6281)
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)

View file

@ -15,7 +15,10 @@ ifdef CONFIG_ARCH_KIRKWOOD
obj-y = dram.o
obj-y += gpio.o
obj-y += mbus.o
ifndef CONFIG_TIMER
obj-y += timer.o
endif
else # CONFIG_ARCH_KIRKWOOD

View file

@ -122,9 +122,6 @@ struct sar_freq_modes {
u32 d_clk;
};
/* Needed for dynamic (board-specific) mbus configuration */
extern struct mvebu_mbus_state mbus_state;
/*
* functions
*/

View file

@ -88,31 +88,34 @@
#define DOVE_DDR_BASE_CS_OFF(n) ((n) << 4)
struct mvebu_mbus_state;
struct mvebu_mbus_soc_data {
unsigned int num_wins;
unsigned int num_remappable_wins;
unsigned int (*win_cfg_offset)(const int win);
void (*setup_cpu_target)(struct mvebu_mbus_state *s);
};
struct mvebu_mbus_state mbus_state
__section(".data");
static struct mbus_dram_target_info mbus_dram_info
__section(".data");
#if defined(CONFIG_ARCH_MVEBU)
#define MVEBU_MBUS_NUM_WINS 20
#define MVEBU_MBUS_NUM_REMAPPABLE_WINS 8
#define MVEBU_MBUS_WIN_CFG_OFFSET(win) armada_370_xp_mbus_win_offset(win)
#elif defined(CONFIG_ARCH_KIRKWOOD)
#define MVEBU_MBUS_NUM_WINS 8
#define MVEBU_MBUS_NUM_REMAPPABLE_WINS 4
#define MVEBU_MBUS_WIN_CFG_OFFSET(win) orion5x_mbus_win_offset(win)
#else
#error "No supported architecture"
#endif
static unsigned int armada_370_xp_mbus_win_offset(int win);
static unsigned int orion5x_mbus_win_offset(int win);
/*
* Functions to manipulate the address decoding windows
*/
static void mvebu_mbus_read_window(struct mvebu_mbus_state *mbus,
int win, int *enabled, u64 *base,
static void mvebu_mbus_read_window(int win, int *enabled, u64 *base,
u32 *size, u8 *target, u8 *attr,
u64 *remap)
{
void __iomem *addr = mbus->mbuswins_base +
mbus->soc->win_cfg_offset(win);
void __iomem *addr = (void __iomem *)MVEBU_CPU_WIN_BASE +
MVEBU_MBUS_WIN_CFG_OFFSET(win);
u32 basereg = readl(addr + WIN_BASE_OFF);
u32 ctrlreg = readl(addr + WIN_CTRL_OFF);
@ -133,7 +136,7 @@ static void mvebu_mbus_read_window(struct mvebu_mbus_state *mbus,
*attr = (ctrlreg & WIN_CTRL_ATTR_MASK) >> WIN_CTRL_ATTR_SHIFT;
if (remap) {
if (win < mbus->soc->num_remappable_wins) {
if (win < MVEBU_MBUS_NUM_REMAPPABLE_WINS) {
u32 remap_low = readl(addr + WIN_REMAP_LO_OFF);
u32 remap_hi = readl(addr + WIN_REMAP_HI_OFF);
*remap = ((u64)remap_hi << 32) | remap_low;
@ -143,27 +146,25 @@ static void mvebu_mbus_read_window(struct mvebu_mbus_state *mbus,
}
}
static void mvebu_mbus_disable_window(struct mvebu_mbus_state *mbus,
int win)
static void mvebu_mbus_disable_window(int win)
{
void __iomem *addr;
addr = mbus->mbuswins_base + mbus->soc->win_cfg_offset(win);
addr = (void __iomem *)MVEBU_CPU_WIN_BASE + MVEBU_MBUS_WIN_CFG_OFFSET(win);
writel(0, addr + WIN_BASE_OFF);
writel(0, addr + WIN_CTRL_OFF);
if (win < mbus->soc->num_remappable_wins) {
if (win < MVEBU_MBUS_NUM_REMAPPABLE_WINS) {
writel(0, addr + WIN_REMAP_LO_OFF);
writel(0, addr + WIN_REMAP_HI_OFF);
}
}
/* Checks whether the given window number is available */
static int mvebu_mbus_window_is_free(struct mvebu_mbus_state *mbus,
const int win)
static int mvebu_mbus_window_is_free(const int win)
{
void __iomem *addr = mbus->mbuswins_base +
mbus->soc->win_cfg_offset(win);
void __iomem *addr = (void __iomem *)MVEBU_CPU_WIN_BASE +
MVEBU_MBUS_WIN_CFG_OFFSET(win);
u32 ctrl = readl(addr + WIN_CTRL_OFF);
return !(ctrl & WIN_CTRL_ENABLE);
}
@ -172,20 +173,19 @@ static int mvebu_mbus_window_is_free(struct mvebu_mbus_state *mbus,
* Checks whether the given (base, base+size) area doesn't overlap an
* existing region
*/
static int mvebu_mbus_window_conflicts(struct mvebu_mbus_state *mbus,
phys_addr_t base, size_t size,
static int mvebu_mbus_window_conflicts(phys_addr_t base, size_t size,
u8 target, u8 attr)
{
u64 end = (u64)base + size;
int win;
for (win = 0; win < mbus->soc->num_wins; win++) {
for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++) {
u64 wbase, wend;
u32 wsize;
u8 wtarget, wattr;
int enabled;
mvebu_mbus_read_window(mbus, win,
mvebu_mbus_read_window(win,
&enabled, &wbase, &wsize,
&wtarget, &wattr, NULL);
@ -211,17 +211,16 @@ static int mvebu_mbus_window_conflicts(struct mvebu_mbus_state *mbus,
return 1;
}
static int mvebu_mbus_find_window(struct mvebu_mbus_state *mbus,
phys_addr_t base, size_t size)
static int mvebu_mbus_find_window(phys_addr_t base, size_t size)
{
int win;
for (win = 0; win < mbus->soc->num_wins; win++) {
for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++) {
u64 wbase;
u32 wsize;
int enabled;
mvebu_mbus_read_window(mbus, win,
mvebu_mbus_read_window(win,
&enabled, &wbase, &wsize,
NULL, NULL, NULL);
@ -235,13 +234,12 @@ static int mvebu_mbus_find_window(struct mvebu_mbus_state *mbus,
return -ENODEV;
}
static int mvebu_mbus_setup_window(struct mvebu_mbus_state *mbus,
int win, phys_addr_t base, size_t size,
static int mvebu_mbus_setup_window(int win, phys_addr_t base, size_t size,
phys_addr_t remap, u8 target,
u8 attr)
{
void __iomem *addr = mbus->mbuswins_base +
mbus->soc->win_cfg_offset(win);
void __iomem *addr = (void __iomem *)MVEBU_CPU_WIN_BASE +
MVEBU_MBUS_WIN_CFG_OFFSET(win);
u32 ctrl, remap_addr;
ctrl = ((size - 1) & WIN_CTRL_SIZE_MASK) |
@ -251,7 +249,7 @@ static int mvebu_mbus_setup_window(struct mvebu_mbus_state *mbus,
writel(base & WIN_BASE_LOW, addr + WIN_BASE_OFF);
writel(ctrl, addr + WIN_CTRL_OFF);
if (win < mbus->soc->num_remappable_wins) {
if (win < MVEBU_MBUS_NUM_REMAPPABLE_WINS) {
if (remap == MVEBU_MBUS_NO_REMAP)
remap_addr = base;
else
@ -263,26 +261,25 @@ static int mvebu_mbus_setup_window(struct mvebu_mbus_state *mbus,
return 0;
}
static int mvebu_mbus_alloc_window(struct mvebu_mbus_state *mbus,
phys_addr_t base, size_t size,
static int mvebu_mbus_alloc_window(phys_addr_t base, size_t size,
phys_addr_t remap, u8 target,
u8 attr)
{
int win;
if (remap == MVEBU_MBUS_NO_REMAP) {
for (win = mbus->soc->num_remappable_wins;
win < mbus->soc->num_wins; win++)
if (mvebu_mbus_window_is_free(mbus, win))
return mvebu_mbus_setup_window(mbus, win, base,
for (win = MVEBU_MBUS_NUM_REMAPPABLE_WINS;
win < MVEBU_MBUS_NUM_WINS; win++)
if (mvebu_mbus_window_is_free(win))
return mvebu_mbus_setup_window(win, base,
size, remap,
target, attr);
}
for (win = 0; win < mbus->soc->num_wins; win++)
if (mvebu_mbus_window_is_free(mbus, win))
return mvebu_mbus_setup_window(mbus, win, base, size,
for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++)
if (mvebu_mbus_window_is_free(win))
return mvebu_mbus_setup_window(win, base, size,
remap, target, attr);
return -ENOMEM;
@ -292,7 +289,7 @@ static int mvebu_mbus_alloc_window(struct mvebu_mbus_state *mbus,
* SoC-specific functions and definitions
*/
static unsigned int armada_370_xp_mbus_win_offset(int win)
static unsigned int __maybe_unused armada_370_xp_mbus_win_offset(int win)
{
/* The register layout is a bit annoying and the below code
* tries to cope with it.
@ -312,12 +309,12 @@ static unsigned int armada_370_xp_mbus_win_offset(int win)
return 0x90 + ((win - 8) << 3);
}
static unsigned int orion5x_mbus_win_offset(int win)
static unsigned int __maybe_unused orion5x_mbus_win_offset(int win)
{
return win << 4;
}
static void mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)
static void mvebu_mbus_default_setup_cpu_target(void)
{
int i;
int cs;
@ -325,8 +322,8 @@ static void mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)
mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
for (i = 0, cs = 0; i < 4; i++) {
u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i));
u32 size = readl(mbus->sdramwins_base + DDR_SIZE_CS_OFF(i));
u32 base = readl((void __iomem *)MVEBU_SDRAM_BASE + DDR_BASE_CS_OFF(i));
u32 size = readl((void __iomem *)MVEBU_SDRAM_BASE + DDR_SIZE_CS_OFF(i));
/*
* We only take care of entries for which the chip
@ -349,26 +346,10 @@ static void mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus)
#if defined(CONFIG_ARMADA_MSYS)
/* Disable MBUS Err Prop - in order to avoid data aborts */
clrbits_le32(mbus->mbuswins_base + 0x200, BIT(8));
clrbits_le32((void __iomem *)MVEBU_CPU_WIN_BASE + 0x200, BIT(8));
#endif
}
static const struct mvebu_mbus_soc_data
armada_370_xp_mbus_data __maybe_unused = {
.num_wins = 20,
.num_remappable_wins = 8,
.win_cfg_offset = armada_370_xp_mbus_win_offset,
.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
};
static const struct mvebu_mbus_soc_data
kirkwood_mbus_data __maybe_unused = {
.num_wins = 8,
.num_remappable_wins = 4,
.win_cfg_offset = orion5x_mbus_win_offset,
.setup_cpu_target = mvebu_mbus_default_setup_cpu_target,
};
/*
* Public API of the driver
*/
@ -382,15 +363,13 @@ int mvebu_mbus_add_window_remap_by_id(unsigned int target,
phys_addr_t base, size_t size,
phys_addr_t remap)
{
struct mvebu_mbus_state *s = &mbus_state;
if (!mvebu_mbus_window_conflicts(s, base, size, target, attribute)) {
if (!mvebu_mbus_window_conflicts(base, size, target, attribute)) {
printf("Cannot add window '%x:%x', conflicts with another window\n",
target, attribute);
return -EINVAL;
}
return mvebu_mbus_alloc_window(s, base, size, remap, target, attribute);
return mvebu_mbus_alloc_window(base, size, remap, target, attribute);
}
int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
@ -404,28 +383,27 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size)
{
int win;
win = mvebu_mbus_find_window(&mbus_state, base, size);
win = mvebu_mbus_find_window(base, size);
if (win < 0)
return win;
mvebu_mbus_disable_window(&mbus_state, win);
mvebu_mbus_disable_window(win);
return 0;
}
#ifndef CONFIG_ARCH_KIRKWOOD
static void mvebu_mbus_get_lowest_base(struct mvebu_mbus_state *mbus,
phys_addr_t *base)
static void mvebu_mbus_get_lowest_base(phys_addr_t *base)
{
int win;
*base = 0xffffffff;
for (win = 0; win < mbus->soc->num_wins; win++) {
for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++) {
u64 wbase;
u32 wsize;
u8 wtarget, wattr;
int enabled;
mvebu_mbus_read_window(mbus, win,
mvebu_mbus_read_window(win,
&enabled, &wbase, &wsize,
&wtarget, &wattr, NULL);
@ -437,14 +415,14 @@ static void mvebu_mbus_get_lowest_base(struct mvebu_mbus_state *mbus,
}
}
static void mvebu_config_mbus_bridge(struct mvebu_mbus_state *mbus)
static void mvebu_config_mbus_bridge(void)
{
phys_addr_t base;
u32 val;
u32 size;
/* Set MBUS bridge base/ctrl */
mvebu_mbus_get_lowest_base(&mbus_state, &base);
mvebu_mbus_get_lowest_base(&base);
size = 0xffffffff - base + 1;
if (!is_power_of_2(size)) {
@ -461,10 +439,9 @@ static void mvebu_config_mbus_bridge(struct mvebu_mbus_state *mbus)
}
#endif
int mbus_dt_setup_win(struct mvebu_mbus_state *mbus,
u32 base, u32 size, u8 target, u8 attr)
int mbus_dt_setup_win(u32 base, u32 size, u8 target, u8 attr)
{
if (!mvebu_mbus_window_conflicts(mbus, base, size, target, attr)) {
if (!mvebu_mbus_window_conflicts(base, size, target, attr)) {
printf("Cannot add window '%04x:%04x', conflicts with another window\n",
target, attr);
return -EBUSY;
@ -474,8 +451,8 @@ int mbus_dt_setup_win(struct mvebu_mbus_state *mbus,
* In U-Boot we first try to add the mbus window to the remap windows.
* If this fails, lets try to add the windows to the non-remap windows.
*/
if (mvebu_mbus_alloc_window(mbus, base, size, base, target, attr)) {
if (mvebu_mbus_alloc_window(mbus, base, size,
if (mvebu_mbus_alloc_window(base, size, base, target, attr)) {
if (mvebu_mbus_alloc_window(base, size,
MVEBU_MBUS_NO_REMAP, target, attr))
return -ENOMEM;
}
@ -486,7 +463,7 @@ int mbus_dt_setup_win(struct mvebu_mbus_state *mbus,
* is called. Since it may get called from the board code in
* later boot stages as well.
*/
mvebu_config_mbus_bridge(mbus);
mvebu_config_mbus_bridge();
#endif
return 0;
@ -498,20 +475,10 @@ int mvebu_mbus_probe(struct mbus_win windows[], int count)
int ret;
int i;
#if defined(CONFIG_ARCH_KIRKWOOD)
mbus_state.soc = &kirkwood_mbus_data;
#endif
#if defined(CONFIG_ARCH_MVEBU)
mbus_state.soc = &armada_370_xp_mbus_data;
#endif
for (win = 0; win < MVEBU_MBUS_NUM_WINS; win++)
mvebu_mbus_disable_window(win);
mbus_state.mbuswins_base = (void __iomem *)MVEBU_CPU_WIN_BASE;
mbus_state.sdramwins_base = (void __iomem *)MVEBU_SDRAM_BASE;
for (win = 0; win < mbus_state.soc->num_wins; win++)
mvebu_mbus_disable_window(&mbus_state, win);
mbus_state.soc->setup_cpu_target(&mbus_state);
mvebu_mbus_default_setup_cpu_target();
/* Setup statically declared windows in the DT */
for (i = 0; i < count; i++) {
@ -522,7 +489,7 @@ int mvebu_mbus_probe(struct mbus_win windows[], int count)
attr = windows[i].attr;
base = windows[i].base;
size = windows[i].size;
ret = mbus_dt_setup_win(&mbus_state, base, size, target, attr);
ret = mbus_dt_setup_win(base, size, target, attr);
if (ret < 0)
return ret;
}

View file

@ -299,6 +299,19 @@ int board_return_to_bootrom(struct spl_image_info *spl_image,
hang();
}
/*
* SPI0 CS0 Flash is mapped to address range 0xD4000000 - 0xD7FFFFFF by BootROM.
* Proper U-Boot removes this direct mapping. So it is available only in SPL.
*/
#if defined(CONFIG_SPL_ENV_IS_IN_SPI_FLASH) && \
CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \
CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= 64*1024*1024
void *env_sf_get_env_addr(void)
{
return (void *)0xD4000000 + CONFIG_ENV_OFFSET;
}
#endif
void board_init_f(ulong dummy)
{
int ret;

View file

@ -821,6 +821,11 @@ int ft_board_setup(void *blob, struct bd_info *bd)
"sgmii");
if (res < 0)
return res;
res = fdt_setprop_string(blob, node, "label",
"sfp");
if (res < 0)
return res;
}
res = fdt_status_okay_by_compatible(blob, "cznic,moxtet-gpio");

View file

@ -21,6 +21,7 @@
#include <dm/uclass.h>
#include <dt-bindings/gpio/gpio.h>
#include <fdt_support.h>
#include <hexdump.h>
#include <time.h>
#include <linux/bitops.h>
#include <linux/delay.h>
@ -61,7 +62,9 @@ DECLARE_GLOBAL_DATA_PTR;
enum mcu_commands {
CMD_GET_STATUS_WORD = 0x01,
CMD_GET_RESET = 0x09,
CMD_GET_FW_VERSION_APP = 0x0a,
CMD_WATCHDOG_STATE = 0x0b,
CMD_GET_FW_VERSION_BOOT = 0x0e,
/* available if STS_FEATURES_SUPPORTED bit set in status word */
CMD_GET_FEATURES = 0x10,
@ -282,16 +285,6 @@ static bool omnia_detect_wwan_usb3(const char *wwan_slot)
return false;
}
void *env_sf_get_env_addr(void)
{
/* SPI Flash is mapped to address 0xD4000000 only in SPL */
#ifdef CONFIG_SPL_BUILD
return (void *)0xD4000000 + CONFIG_ENV_OFFSET;
#else
return NULL;
#endif
}
int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
{
#ifdef CONFIG_SPL_ENV_SUPPORT
@ -428,6 +421,38 @@ static const char * const omnia_get_mcu_type(void)
return mcu_types[stsword & STS_MCU_TYPE_MASK];
}
static const char * const omnia_get_mcu_version(void)
{
static char version[82];
u8 version_app[20];
u8 version_boot[20];
int ret;
ret = omnia_mcu_read(CMD_GET_FW_VERSION_APP, &version_app, sizeof(version_app));
if (ret)
return "unknown";
ret = omnia_mcu_read(CMD_GET_FW_VERSION_BOOT, &version_boot, sizeof(version_boot));
if (ret)
return "unknown";
/*
* If git commits of MCU bootloader and MCU application are same then
* show version only once. If they are different then show both commits.
*/
if (!memcmp(version_app, version_boot, 20)) {
bin2hex(version, version_app, 20);
version[40] = '\0';
} else {
bin2hex(version, version_boot, 20);
version[40] = '/';
bin2hex(version + 41, version_app, 20);
version[81] = '\0';
}
return version;
}
/*
* Define the DDR layout / topology here in the board file. This will
* be used by the DDR3 init code in the SPL U-Boot version to configure
@ -944,6 +969,7 @@ int show_board_info(void)
err = turris_atsha_otp_get_serial_number(&version_num, &serial_num);
printf("Model: Turris Omnia\n");
printf(" MCU type: %s\n", omnia_get_mcu_type());
printf(" MCU version: %s\n", omnia_get_mcu_version());
printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024);
if (err)
printf(" Serial Number: unknown\n");

View file

@ -10,6 +10,7 @@
#include <miiphy.h>
#include <net.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/setup.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>

View file

@ -109,7 +109,7 @@ int board_init(void)
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
/* window for NVS */
mbus_dt_setup_win(&mbus_state, CONFIG_NVS_LOCATION, CONFIG_NVS_SIZE,
mbus_dt_setup_win(CONFIG_NVS_LOCATION, CONFIG_NVS_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1);
/* DEV_READYn is not needed for NVS, ignore it when accessing CS1 */

View file

@ -31,8 +31,8 @@ generated if no valid address could be loaded from the environment variable
'ethaddr' and a DHCP request is sent. After a successful DHCP response is
received, the network settings are configured and the ncip is unset. Thus
all netconsole packets are broadcasted and you can use the netconsole to
access board from any host within the network segment. To determine the IP
address assigned to the board, you either have to sniff the traffic or
access the board from any host within the network segment. To determine the
IP address assigned to the board, you either have to sniff the traffic or
check the logs/leases of your DHCP server.
The resuce mode is selected by holding the push button for at least one
@ -42,41 +42,43 @@ the resuce mode is enabled, thus providing a visual feedback.
Pressing the same button for at least 10 seconds on power-up will erase the
environment and reset the board. In this case the visual indication will
be:
- blinking blue, for about one second
- solid amber, for about nine seconds
- blinking amber, until you release the button
- blue, for about one second
- amber, for about nine seconds
- red, until you release the button
This ensures, that you still can recover a device with a broken
environment by first erasing the environment and then entering the rescue
mode.
Once the rescue mode is started, use the ncb binary from the tools/
directory to access your board. There is a helper script named
'restore_env' to save your changes. It unsets all the network variables
which were set by the rescue mode, saves your changes and then resets the
board.
directory to access your board.
The common use case for this is setting a MAC address. Let us assume you
have an empty environment, the board comes up with the amber LED blinking.
have an empty environment, the board comes up with the amber LED turned on.
Then you enter the rescue mode, connect to the board with the ncb tool and
use the following commands to set your MAC address:
setenv ethaddr 00:00:00:00:00:00
run restore_env
setenv -f ethaddr 00:00:00:00:00:00
saveenv
reset
Of course you need to replace the 00:00:00:00:00:00 with your valid MAC
address, which can be found on a sticker on the bottom of your box.
You cannot store the network console setting in the environment. On reset
it is automatically restored to serial. Therefore, you have to use the
push-button to enter resuce mode again.
Status LED
----------
blinking blue
blue
Bootloader is running normally.
blinking amber
amber
No ethaddr set. Use the `Rescue Mode` to set one.
blinking red
red
Something bad happend during loading the operating system.
The default behavior of the linux kernel is to turn on the blue LED. So if

View file

@ -9,21 +9,18 @@
#include <common.h>
#include <bootstage.h>
#include <button.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
#include <init.h>
#include <net.h>
#include <malloc.h>
#include <netdev.h>
#include <miiphy.h>
#include <led.h>
#include <power/regulator.h>
#include <spi.h>
#include <spi_flash.h>
#include <asm/arch/soc.h>
#include <asm/arch/cpu.h>
#include <asm/arch/mpp.h>
#include <asm/arch/gpio.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/delay.h>
#include "lsxl.h"
@ -45,12 +42,10 @@
* Additionally, the bootsource is set to 'rescue'.
*/
#ifndef CONFIG_ENV_OVERWRITE
# error "You need to set CONFIG_ENV_OVERWRITE"
#endif
DECLARE_GLOBAL_DATA_PTR;
static bool force_rescue_mode;
int board_early_init_f(void)
{
/*
@ -125,48 +120,43 @@ int board_early_init_f(void)
return 0;
}
#define LED_OFF 0
#define LED_ALARM_ON 1
#define LED_ALARM_BLINKING 2
#define LED_POWER_ON 3
#define LED_POWER_BLINKING 4
#define LED_INFO_ON 5
#define LED_INFO_BLINKING 6
enum {
LSXL_LED_OFF,
LSXL_LED_ALARM,
LSXL_LED_POWER,
LSXL_LED_INFO,
};
static void __set_led(int blink_alarm, int blink_info, int blink_power,
int value_alarm, int value_info, int value_power)
static void __set_led(int alarm, int info, int power)
{
kw_gpio_set_blink(GPIO_ALARM_LED, blink_alarm);
kw_gpio_set_blink(GPIO_INFO_LED, blink_info);
kw_gpio_set_blink(GPIO_POWER_LED, blink_power);
kw_gpio_set_value(GPIO_ALARM_LED, value_alarm);
kw_gpio_set_value(GPIO_INFO_LED, value_info);
kw_gpio_set_value(GPIO_POWER_LED, value_power);
struct udevice *led;
int ret;
ret = led_get_by_label("lsxl:red:alarm", &led);
if (!ret)
led_set_state(led, alarm);
ret = led_get_by_label("lsxl:amber:info", &led);
if (!ret)
led_set_state(led, info);
ret = led_get_by_label("lsxl:blue:power", &led);
if (!ret)
led_set_state(led, power);
}
static void set_led(int state)
{
switch (state) {
case LED_OFF:
__set_led(0, 0, 0, 1, 1, 1);
case LSXL_LED_OFF:
__set_led(0, 0, 0);
break;
case LED_ALARM_ON:
__set_led(0, 0, 0, 0, 1, 1);
case LSXL_LED_ALARM:
__set_led(1, 0, 0);
break;
case LED_ALARM_BLINKING:
__set_led(1, 0, 0, 1, 1, 1);
case LSXL_LED_INFO:
__set_led(0, 1, 0);
break;
case LED_INFO_ON:
__set_led(0, 0, 0, 1, 0, 1);
break;
case LED_INFO_BLINKING:
__set_led(0, 1, 0, 1, 1, 1);
break;
case LED_POWER_ON:
__set_led(0, 0, 0, 1, 1, 0);
break;
case LED_POWER_BLINKING:
__set_led(0, 0, 1, 1, 1, 1);
case LSXL_LED_POWER:
__set_led(0, 0, 1);
break;
}
}
@ -176,33 +166,56 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
set_led(LED_POWER_BLINKING);
set_led(LSXL_LED_POWER);
return 0;
}
#ifdef CONFIG_MISC_INIT_R
static void check_power_switch(void)
{
if (kw_gpio_get_value(GPIO_POWER_SWITCH)) {
/* turn off fan, HDD and USB power */
kw_gpio_set_value(GPIO_HDD_POWER, 0);
kw_gpio_set_value(GPIO_USB_VBUS, 0);
kw_gpio_set_value(GPIO_FAN_HIGH, 1);
kw_gpio_set_value(GPIO_FAN_LOW, 1);
set_led(LED_OFF);
struct udevice *power_button, *hdd_power, *usb_power;
int ret;
ret = button_get_by_label("Power-on Switch", &power_button);
if (ret)
goto err;
ret = regulator_get_by_platname("HDD Power", &hdd_power);
if (ret)
goto err;
ret = regulator_get_by_platname("USB Power", &usb_power);
if (ret)
goto err;
if (button_get_state(power_button) == BUTTON_OFF) {
ret = regulator_set_enable(hdd_power, false);
if (ret)
goto err;
ret = regulator_set_enable(usb_power, false);
if (ret)
goto err;
/* TODO: fan off */
set_led(LSXL_LED_OFF);
/* loop until released */
while (kw_gpio_get_value(GPIO_POWER_SWITCH))
while (button_get_state(power_button) == BUTTON_OFF)
;
/* turn power on again */
kw_gpio_set_value(GPIO_HDD_POWER, 1);
kw_gpio_set_value(GPIO_USB_VBUS, 1);
kw_gpio_set_value(GPIO_FAN_HIGH, 0);
kw_gpio_set_value(GPIO_FAN_LOW, 0);
set_led(LED_POWER_BLINKING);
}
ret = regulator_set_enable(hdd_power, true);
if (ret)
goto err;
ret = regulator_set_enable(usb_power, true);
if (ret)
goto err;
/* TODO: fan on */
set_led(LSXL_LED_POWER);
};
return;
err:
printf("error in %s\n", __func__);
}
void check_enetaddr(void)
@ -211,7 +224,7 @@ void check_enetaddr(void)
if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
/* signal unset/invalid ethaddr to user */
set_led(LED_INFO_BLINKING);
set_led(LSXL_LED_INFO);
}
}
@ -239,17 +252,24 @@ static void rescue_mode(void)
static void check_push_button(void)
{
struct udevice *func_button;
int i = 0;
while (!kw_gpio_get_value(GPIO_FUNC_BUTTON)) {
int ret;
ret = button_get_by_label("Function Button", &func_button);
if (ret)
goto err;
while (button_get_state(func_button) == BUTTON_ON) {
udelay(100000);
i++;
if (i == 10)
set_led(LED_INFO_ON);
set_led(LSXL_LED_INFO);
if (i >= 100) {
set_led(LED_INFO_BLINKING);
set_led(LSXL_LED_ALARM);
break;
}
}
@ -257,18 +277,29 @@ static void check_push_button(void)
if (i >= 100)
erase_environment();
else if (i >= 10)
rescue_mode();
force_rescue_mode = true;
return;
err:
printf("error in %s\n", __func__);
}
int board_early_init_r(void)
{
check_push_button();
return 0;
}
int misc_init_r(void)
{
check_power_switch();
check_enetaddr();
check_push_button();
if (force_rescue_mode)
rescue_mode();
return 0;
}
#endif
#if CONFIG_IS_ENABLED(BOOTSTAGE)
void show_boot_progress(int progress)
@ -280,6 +311,6 @@ void show_boot_progress(int progress)
if (progress == -BOOTSTAGE_ID_NET_LOADED)
return;
set_led(LED_ALARM_BLINKING);
set_led(LSXL_LED_ALARM);
}
#endif

View file

@ -112,13 +112,13 @@ int board_early_init_f(void)
/*
* Setup some board specific mbus address windows
*/
mbus_dt_setup_win(&mbus_state, DEV_CS0_BASE, 16 << 20,
mbus_dt_setup_win(DEV_CS0_BASE, 16 << 20,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS0);
mbus_dt_setup_win(&mbus_state, DEV_CS1_BASE, 16 << 20,
mbus_dt_setup_win(DEV_CS1_BASE, 16 << 20,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1);
mbus_dt_setup_win(&mbus_state, DEV_CS2_BASE, 16 << 20,
mbus_dt_setup_win(DEV_CS2_BASE, 16 << 20,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS2);
mbus_dt_setup_win(&mbus_state, DEV_CS3_BASE, 16 << 20,
mbus_dt_setup_win(DEV_CS3_BASE, 16 << 20,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS3);
return 0;

View file

@ -208,9 +208,9 @@ int board_init(void)
* Map SPI devices via MBUS so that they can be accessed via
* the SPI direct access mode
*/
mbus_dt_setup_win(&mbus_state, SPI_BUS0_DEV1_BASE, SPI_BUS0_DEV1_SIZE,
mbus_dt_setup_win(SPI_BUS0_DEV1_BASE, SPI_BUS0_DEV1_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPI0_CS1);
mbus_dt_setup_win(&mbus_state, SPI_BUS1_DEV2_BASE, SPI_BUS0_DEV1_SIZE,
mbus_dt_setup_win(SPI_BUS1_DEV2_BASE, SPI_BUS0_DEV1_SIZE,
CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_SPI1_CS2);
/*

View file

@ -1,5 +1,4 @@
NSA310S BOARD
M: Gerald Kerma <dreagle@doukki.net>
M: Tony Dinh <mibodhi@gmail.com>
M: Luka Perkov <luka.perkov@sartura.hr>
S: Maintained

View file

@ -3,39 +3,44 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lschl.cfg"
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_LSXL=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2"
CONFIG_IDENT_STRING=" LS-CHLv2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_API=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x5ff000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=393216
# CONFIG_BOOTSTD is not set
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_BOOTCOMMAND="run bootcmd_${bootsource}"
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DEFAULT_FDT_FILE="kirkwood-lschlv2.dtb"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SATA=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_BUTTON is not set
# CONFIG_CMD_LED is not set
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
@ -46,17 +51,27 @@ CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_BUTTON=y
CONFIG_BUTTON_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=25000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_TIMER=y
CONFIG_ORION_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

View file

@ -3,40 +3,45 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lsxhl.cfg"
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_LSXL=y
CONFIG_LSXHL=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl"
CONFIG_IDENT_STRING=" LS-XHL"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_API=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x5ff000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=393216
# CONFIG_BOOTSTD is not set
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_BOOTCOMMAND="run bootcmd_${bootsource}"
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DEFAULT_FDT_FILE="kirkwood-lsxhl.dtb"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SATA=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_BUTTON is not set
# CONFIG_CMD_LED is not set
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
@ -47,17 +52,27 @@ CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_BUTTON=y
CONFIG_BUTTON_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=25000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_MVGBE=y
CONFIG_MII=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
CONFIG_TIMER=y
CONFIG_ORION_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

View file

@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg"
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_SYS_MALLOC_F_LEN=0x400
@ -15,34 +18,24 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
CONFIG_SYS_PROMPT="NSA310s> "
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000"
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)"
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@ -64,6 +57,6 @@ CONFIG_MII=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_UBIFS_SILENCE_MSG=y
CONFIG_LZMA=y
CONFIG_BZIP2=y

View file

@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_KIRKWOOD=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
CONFIG_INITRD_TAG=y
CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_v4/kwbimage.cfg"
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_SYS_MALLOC_F_LEN=0x400
@ -14,22 +17,23 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
CONFIG_SYS_PROMPT="Pogo_V4> "
CONFIG_IDENT_STRING="\nPogoplug V4"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${bootargs_console}; run bootcmd_usb; bootm 0x00800000 0x01100000 0x2c00000"
CONFIG_USE_PREBOOT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
@ -37,22 +41,14 @@ CONFIG_CMD_NAND=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_CMD_BLOCK_CACHE is not set
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:2M(u-boot),3M(uImage),3M(uImage2),8M(failsafe),112M(root)"
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
@ -62,6 +58,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_DM=y
# CONFIG_DM_WARN is not set
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_LBA48=y
@ -83,6 +80,6 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_NAND=y
CONFIG_UBIFS_SILENCE_MSG=y

View file

@ -20,6 +20,7 @@ config BUTTON_ADC
config BUTTON_GPIO
bool "Button gpio"
depends on BUTTON
depends on DM_GPIO
help
Enable support for buttons which are connected to GPIO lines. These
GPIOs may be on the SoC or some other device which provides GPIOs.

View file

@ -194,6 +194,12 @@ config OMAP_TIMER
help
Select this to enable an timer for Omap devices.
config ORION_TIMER
bool "Orion timer support"
depends on TIMER
help
Select this to enable an timer for Orion devices.
config RISCV_TIMER
bool "RISC-V timer support"
depends on TIMER && RISCV

View file

@ -17,6 +17,7 @@ obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o
obj-$(CONFIG_NPCM_TIMER) += npcm-timer.o
obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
obj-$(CONFIG_ORION_TIMER) += orion-timer.o
obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o

View file

@ -0,0 +1,63 @@
// SPDX-License-Identifier: GPL-2.0+
#include <asm/io.h>
#include <common.h>
#include <dm/device.h>
#include <dm/fdtaddr.h>
#include <timer.h>
#define TIMER_CTRL 0x00
#define TIMER0_EN BIT(0)
#define TIMER0_RELOAD_EN BIT(1)
#define TIMER0_RELOAD 0x10
#define TIMER0_VAL 0x14
struct orion_timer_priv {
void *base;
};
static uint64_t orion_timer_get_count(struct udevice *dev)
{
struct orion_timer_priv *priv = dev_get_priv(dev);
return ~readl(priv->base + TIMER0_VAL);
}
static int orion_timer_probe(struct udevice *dev)
{
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct orion_timer_priv *priv = dev_get_priv(dev);
priv->base = devfdt_remap_addr_index(dev, 0);
if (!priv->base) {
debug("unable to map registers\n");
return -ENOMEM;
}
uc_priv->clock_rate = CONFIG_SYS_TCLK;
writel(~0, priv->base + TIMER0_VAL);
writel(~0, priv->base + TIMER0_RELOAD);
/* enable timer */
setbits_le32(priv->base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN);
return 0;
}
static const struct timer_ops orion_timer_ops = {
.get_count = orion_timer_get_count,
};
static const struct udevice_id orion_timer_ids[] = {
{ .compatible = "marvell,orion-timer" },
{}
};
U_BOOT_DRIVER(orion_timer) = {
.name = "orion_timer",
.id = UCLASS_TIMER,
.of_match = orion_timer_ids,
.probe = orion_timer_probe,
.ops = &orion_timer_ops,
.priv_auto = sizeof(struct orion_timer_priv),
};

View file

@ -22,73 +22,41 @@
/*
* Default environment variables
*/
#if defined(CONFIG_LSXHL)
#define CONFIG_FDTFILE "kirkwood-lsxhl.dtb"
#elif defined(CONFIG_LSCHLV2)
#define CONFIG_FDTFILE "kirkwood-lschlv2.dtb"
#else
#error "Unsupported board"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootsource=legacy\0" \
"hdpart=0:1\0" \
"kernel_addr=0x00800000\0" \
"ramdisk_addr=0x01000000\0" \
"fdt_addr=0x00ff0000\0" \
"kernel_addr_r=0x00800000\0" \
"ramdisk_addr_r=0x01000000\0" \
"fdt_addr_r=0x00ff0000\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"bootcmd_legacy=sata init " \
"&& load sata ${hdpart} ${kernel_addr} /uImage.buffalo "\
"&& load sata ${hdpart} ${ramdisk_addr} /initrd.buffalo "\
"&& bootm ${kernel_addr} ${ramdisk_addr}\0" \
"bootcmd_net=bootp ${kernel_addr} vmlinuz " \
"&& tftpboot ${ramdisk_addr} initrd.img " \
"&& setenv ramdisk_len ${filesize} " \
"&& tftpboot ${fdt_addr} " CONFIG_FDTFILE " " \
"&& bootz ${kernel_addr} " \
"${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \
"&& load sata ${hdpart} ${kernel_addr_r} /uImage.buffalo "\
"&& load sata ${hdpart} ${ramdisk_addr_r} /initrd.buffalo "\
"&& bootm ${kernel_addr_r} ${ramdisk_addr_r}\0" \
"bootcmd_net=bootp ${kernel_addr_r} vmlinuz " \
"&& tftpboot ${fdt_addr_r} ${fdtfile} " \
"&& tftpboot ${ramdisk_addr_r} initrd.img " \
"&& bootz ${kernel_addr_r} " \
"${ramdisk_addr_r}:${filesize} ${fdt_addr_r}\0" \
"bootcmd_hdd=sata init " \
"&& load sata ${hdpart} ${kernel_addr} /vmlinuz " \
"&& load sata ${hdpart} ${ramdisk_addr} /initrd.img " \
"&& setenv ramdisk_len ${filesize} " \
"&& load sata ${hdpart} ${fdt_addr} /dtb " \
"&& bootz ${kernel_addr} " \
"${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \
"&& load sata ${hdpart} ${kernel_addr_r} /vmlinuz " \
"&& load sata ${hdpart} ${fdt_addr_r} /dtb " \
"&& load sata ${hdpart} ${ramdisk_addr_r} /initrd.img " \
"&& bootz ${kernel_addr_r} " \
"${ramdisk_addr_r}:${filesize} ${fdt_addr_r}\0" \
"bootcmd_usb=usb start " \
"&& load usb 0:1 ${kernel_addr} /vmlinuz " \
"&& load usb 0:1 ${ramdisk_addr} /initrd.img " \
"&& setenv ramdisk_len ${filesize} " \
"&& load usb 0:1 ${fdt_addr} " CONFIG_FDTFILE " " \
"&& bootz ${kernel_addr} " \
"${ramdisk_addr}:${ramdisk_len} ${fdt_addr}\0" \
"&& load usb 0:1 ${kernel_addr_r} /vmlinuz " \
"&& load usb 0:1 ${fdt_addr_r} ${fdtfile} " \
"&& load usb 0:1 ${ramdisk_addr_r} /initrd.img " \
"&& bootz ${kernel_addr_r} " \
"${ramdisk_addr_r}:${filesize} ${fdt_addr_r}\0" \
"bootcmd_rescue=run config_nc_dhcp; run nc\0" \
"eraseenv=sf probe 0 " \
"&& sf erase " __stringify(CONFIG_ENV_OFFSET) \
" +" __stringify(CONFIG_ENV_SIZE) "\0" \
"config_nc_dhcp=setenv autoload_old ${autoload}; " \
"setenv autoload no " \
"&& bootp " \
"&& setenv ncip " \
"&& setenv autoload ${autoload_old}; " \
"setenv autoload_old\0" \
"standard_env=setenv ipaddr; setenv netmask; setenv serverip; " \
"setenv ncip; setenv gatewayip; setenv ethact; " \
"setenv bootfile; setenv dnsip; " \
"setenv bootsource legacy; run ser\0" \
"restore_env=run standard_env; saveenv; reset\0" \
"ser=setenv stdin serial; setenv stdout serial; " \
"setenv stderr serial\0" \
"nc=setenv stdin nc; setenv stdout nc; setenv stderr nc\0" \
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0"
/*
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_MVGBE_PORTS {0, 1} /* enable port 1 only */
#define CONFIG_PHY_BASE_ADR 7
#endif /* CONFIG_CMD_NET */
#endif /* _CONFIG_LSXL_H */

View file

@ -9,15 +9,42 @@
#ifndef _CONFIG_NSA310S_H
#define _CONFIG_NSA310S_H
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
#include "mv-common.h"
/* default environment variables */
/* Include the common distro boot environment */
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(SATA, sata, 0) \
func(DHCP, dhcp, na)
#define KERNEL_ADDR_R __stringify(0x800000)
#define FDT_ADDR_R __stringify(0x2c00000)
#define RAMDISK_ADDR_R __stringify(0x01100000)
#define SCRIPT_ADDR_R __stringify(0x200000)
#define LOAD_ADDRESS_ENV_SETTINGS \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
"scriptaddr=" SCRIPT_ADDR_R "\0"
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=console=ttyS0,115200\0" \
"kernel=/boot/zImage\0" \
"fdt=/boot/nsa310s.dtb\0" \
"bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0"
"bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" \
LOAD_ADDRESS_ENV_SETTINGS \
BOOTENV
#endif /* CONFIG_SPL_BUILD */
/* Ethernet driver configuration */
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */

View file

@ -21,15 +21,53 @@
*/
#include "mv-common.h"
/*
* Default environment variables
*/
/* Include the common distro boot environment */
#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#endif
#ifdef CONFIG_SATA
#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0)
#else
#define BOOT_TARGET_DEVICES_SATA(func)
#endif
#ifdef CONFIG_USB_STORAGE
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif
#define BOOT_TARGET_DEVICES(func) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_USB(func) \
BOOT_TARGET_DEVICES_SATA(func) \
func(DHCP, dhcp, na)
#define KERNEL_ADDR_R __stringify(0x800000)
#define FDT_ADDR_R __stringify(0x2c00000)
#define RAMDISK_ADDR_R __stringify(0x01100000)
#define SCRIPT_ADDR_R __stringify(0x200000)
#define LOAD_ADDRESS_ENV_SETTINGS \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
"scriptaddr=" SCRIPT_ADDR_R "\0"
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
"dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"bootargs_console=console=ttyS0,115200\0" \
"bootcmd_usb=usb start; load usb 0:1 0x00800000 /boot/uImage; " \
"load usb 0:1 0x01100000 /boot/uInitrd; " \
"load usb 0:1 0x2c00000 $dtb_file\0"
LOAD_ADDRESS_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"console=ttyS0,115200\0" \
BOOTENV
#endif /* CONFIG_SPL_BUILD */
/*
* Ethernet Driver configuration

View file

@ -33,16 +33,6 @@ struct mbus_dram_target_info {
} cs[4];
};
struct mvebu_mbus_state {
void __iomem *mbuswins_base;
void __iomem *sdramwins_base;
struct dentry *debugfs_root;
struct dentry *debugfs_sdram;
struct dentry *debugfs_devs;
const struct mvebu_mbus_soc_data *soc;
int hw_io_coherency;
};
/* Flags for PCI/PCIe address decoding regions */
#define MVEBU_MBUS_PCI_IO 0x1
#define MVEBU_MBUS_PCI_MEM 0x2
@ -67,7 +57,6 @@ int mvebu_mbus_add_window_remap_by_id(unsigned int target,
int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
phys_addr_t base, size_t size);
int mvebu_mbus_del_window(phys_addr_t base, size_t size);
int mbus_dt_setup_win(struct mvebu_mbus_state *mbus,
u32 base, u32 size, u8 target, u8 attr);
int mbus_dt_setup_win(u32 base, u32 size, u8 target, u8 attr);
#endif /* __LINUX_MBUS_H */

View file

@ -47,12 +47,15 @@ ulong timer_get_boot_us(void)
{
ulong count = timer_read_counter();
#if CONFIG_SYS_TIMER_RATE == 1000000
return count;
#elif CONFIG_SYS_TIMER_RATE > 1000000
return lldiv(count, CONFIG_SYS_TIMER_RATE / 1000000);
#elif defined(CONFIG_SYS_TIMER_RATE)
return (unsigned long long)count * 1000000 / CONFIG_SYS_TIMER_RATE;
#ifdef CONFIG_SYS_TIMER_RATE
const ulong timer_rate = CONFIG_SYS_TIMER_RATE;
if (timer_rate == 1000000)
return count;
else if (timer_rate > 1000000)
return lldiv(count, timer_rate / 1000000);
else
return (unsigned long long)count * 1000000 / timer_rate;
#else
/* Assume the counter is in microseconds */
return count;