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arm64: zynqmp: Add support for zcu102 1.0 rev
1.0 rev is the latest rev. Describe information in eeprom. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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4 changed files with 121 additions and 1 deletions
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@ -146,6 +146,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
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zynqmp-ep108.dtb \
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zynqmp-ep108.dtb \
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zynqmp-zcu102-revA.dtb \
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zynqmp-zcu102-revA.dtb \
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zynqmp-zcu102-revB.dtb \
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zynqmp-zcu102-revB.dtb \
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zynqmp-zcu102-rev1.0.dtb \
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zynqmp-zc1751-xm015-dc1.dtb \
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zynqmp-zc1751-xm015-dc1.dtb \
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zynqmp-zc1751-xm016-dc2.dtb \
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zynqmp-zc1751-xm016-dc2.dtb \
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zynqmp-zc1751-xm018-dc4.dtb \
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zynqmp-zc1751-xm018-dc4.dtb \
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37
arch/arm/dts/zynqmp-zcu102-rev1.0.dts
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37
arch/arm/dts/zynqmp-zcu102-rev1.0.dts
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@ -0,0 +1,37 @@
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/*
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* dts file for Xilinx ZynqMP ZCU102 Rev1.0
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*
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* (C) Copyright 2016, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include "zynqmp-zcu102-revB.dts"
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/ {
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model = "ZynqMP ZCU102 Rev1.0";
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compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
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};
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&eeprom {
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#address-cells = <1>;
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#size-cells = <1>;
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board_sn: board_sn@0 {
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reg = <0x0 0x14>;
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};
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eth_mac: eth_mac@20 {
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reg = <0x20 0x6>;
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};
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board_name: board_name@d0 {
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reg = <0xd0 0x6>;
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};
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board_revision: board_revision@e0 {
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reg = <0xe0 0x3>;
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};
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};
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@ -437,7 +437,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
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* 512B - 768B address 0x56
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* 512B - 768B address 0x56
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* 768B - 1024B address 0x57
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* 768B - 1024B address 0x57
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*/
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*/
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eeprom@54 { /* u23 */
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eeprom: eeprom@54 { /* u23 */
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compatible = "at,24c08";
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compatible = "at,24c08";
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reg = <0x54>;
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reg = <0x54>;
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};
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};
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82
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
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82
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
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@ -0,0 +1,82 @@
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CONFIG_ARM=y
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CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
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CONFIG_ARCH_ZYNQMP=y
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CONFIG_SYS_TEXT_BASE=0x8000000
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CONFIG_SYS_MALLOC_F_LEN=0x8000
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CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 rev1.0"
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CONFIG_ZYNQMP_USB=y
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CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-rev1.0"
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CONFIG_DEBUG_UART=y
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CONFIG_AHCI=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SPL=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_SYS_PROMPT="ZynqMP> "
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CONFIG_FASTBOOT=y
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=0
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CONFIG_CMD_THOR_DOWNLOAD=y
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CONFIG_CMD_EEPROM=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_DFU=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_TIMER=y
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_ISO_PARTITION is not set
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_EMBED=y
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CONFIG_ENV_IS_IN_FAT=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_SATA_CEVA=y
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CONFIG_DFU_RAM=y
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CONFIG_FPGA_XILINX=y
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CONFIG_FPGA_ZYNQMPPL=y
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CONFIG_DM_GPIO=y
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CONFIG_CMD_PCA953X=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ZYNQ=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_DM_ETH=y
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CONFIG_PHY_GIGE=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_SCSI=y
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CONFIG_DM_SCSI=y
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CONFIG_DEBUG_UART_ZYNQ=y
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CONFIG_DEBUG_UART_BASE=0xff000000
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CONFIG_DEBUG_UART_CLOCK=100000000
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_ZYNQ_SERIAL=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_XHCI_ZYNQMP=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GADGET=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
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CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
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CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
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CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
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