mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
sunxi: remove CONFIG_SATAPWR
The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that enables the power for a SATA harddisk. In the DT this is described with the target-supply property in the AHCI DT node, pointing to a (GPIO controlled) regulator. Since we need SATA only in U-Boot proper, and use a DM driver for AHCI there, we should use the DT instead of hardcoding this. Add code to the sunxi AHCI driver to check the DT for that regulator and enable it, at probe time. Then drop the current code from board.c, which was doing that job before. This allows us to remove the SATAPWR Kconfig definition and the respective values from the defconfigs. We also select the generic fixed regulator driver, which handles those GPIO controlled regulators. Please note that the OrangePi Plus is a bit special here, it's a H3 board without native SATA, but with a USB-to-SATA bridge. The DT models the SATA power via a VBUS supply regulator, which we don't parse yet in the USB PHY driver. Use the hardcoded CONFIG_USB3_VBUS_PIN for that board meanwhile. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
parent
a14c250625
commit
ae79c1d01f
22 changed files with 13 additions and 41 deletions
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@ -1159,6 +1159,8 @@ config ARCH_SUNXI
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imply CMD_GPT
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imply CMD_GPT
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imply CMD_UBI if MTD_RAW_NAND
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imply CMD_UBI if MTD_RAW_NAND
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imply DISTRO_DEFAULTS
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imply DISTRO_DEFAULTS
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imply DM_REGULATOR
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imply DM_REGULATOR_FIXED
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imply FAT_WRITE
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imply FAT_WRITE
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imply FIT
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imply FIT
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imply OF_LIBFDT_OVERLAY
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imply OF_LIBFDT_OVERLAY
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@ -1008,14 +1008,6 @@ config VIDEO_LCD_TL059WV5C0
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endchoice
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endchoice
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config SATAPWR
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string "SATA power pin"
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default ""
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help
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Set the pins used to power the SATA. This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
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port H.
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config GMAC_TX_DELAY
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config GMAC_TX_DELAY
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int "GMAC Transmit Clock Delay Chain"
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int "GMAC Transmit Clock Delay Chain"
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default 0
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default 0
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@ -187,7 +187,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
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/* add board specific code here */
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/* add board specific code here */
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int board_init(void)
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int board_init(void)
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{
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{
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__maybe_unused int id_pfr1, ret, satapwr_pin, macpwr_pin;
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__maybe_unused int id_pfr1, ret, macpwr_pin;
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gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
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gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
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@ -225,20 +225,6 @@ int board_init(void)
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return ret;
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return ret;
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/* strcmp() would look better, but doesn't get optimised away. */
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/* strcmp() would look better, but doesn't get optimised away. */
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if (CONFIG_SATAPWR[0]) {
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satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR);
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if (satapwr_pin >= 0) {
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gpio_request(satapwr_pin, "satapwr");
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gpio_direction_output(satapwr_pin, 1);
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/*
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* Give the attached SATA device time to power-up
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* to avoid link timeouts
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*/
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mdelay(500);
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}
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}
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if (CONFIG_MACPWR[0]) {
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if (CONFIG_MACPWR[0]) {
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macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
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macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
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if (macpwr_pin >= 0) {
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if (macpwr_pin >= 0) {
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@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=480
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CONFIG_DRAM_EMR1=4
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CONFIG_DRAM_EMR1=4
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CONFIG_SYS_CLK_FREQ=912000000
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CONFIG_SYS_CLK_FREQ=912000000
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_SATAPWR="PC3"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -8,7 +8,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_SATAPWR="PC3"
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CONFIG_SPL_SPI_SUNXI=y
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CONFIG_SPL_SPI_SUNXI=y
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_SATAPWR="PC3"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -5,7 +5,6 @@ CONFIG_SPL=y
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CONFIG_MACH_SUN7I=y
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CONFIG_MACH_SUN7I=y
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CONFIG_DRAM_CLK=384
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CONFIG_DRAM_CLK=384
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_SATAPWR="PC3"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_VIDEO_VGA=y
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CONFIG_VIDEO_VGA=y
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CONFIG_SATAPWR="PB8"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
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CONFIG_MMC_SUNXI_SLOT_EXTRA=3
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CONFIG_MMC_SUNXI_SLOT_EXTRA=3
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_VIDEO_VGA=y
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CONFIG_VIDEO_VGA=y
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CONFIG_SATAPWR="PB8"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
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CONFIG_MMC_SUNXI_SLOT_EXTRA=3
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CONFIG_MMC_SUNXI_SLOT_EXTRA=3
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CONFIG_USB0_VBUS_PIN="PB9"
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CONFIG_USB0_VBUS_PIN="PB9"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_SATAPWR="PC3"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -8,7 +8,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_SATAPWR="PC3"
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CONFIG_GMAC_TX_DELAY=4
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CONFIG_GMAC_TX_DELAY=4
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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@ -7,7 +7,6 @@ CONFIG_DRAM_CLK=384
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_PIN="PC17"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_USB0_VBUS_DET="PH5"
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CONFIG_I2C1_ENABLE=y
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CONFIG_I2C1_ENABLE=y
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CONFIG_SATAPWR="PC3"
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CONFIG_GMAC_TX_DELAY=4
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CONFIG_GMAC_TX_DELAY=4
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
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CONFIG_SPL=y
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CONFIG_SPL=y
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CONFIG_MACH_SUN7I=y
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CONFIG_MACH_SUN7I=y
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CONFIG_DRAM_CLK=480
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CONFIG_DRAM_CLK=480
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CONFIG_SATAPWR="PB8"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard"
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CONFIG_SPL=y
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CONFIG_SPL=y
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CONFIG_MACH_SUN4I=y
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CONFIG_MACH_SUN4I=y
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CONFIG_DRAM_CLK=480
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CONFIG_DRAM_CLK=480
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CONFIG_SATAPWR="PB8"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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@ -8,7 +8,6 @@ CONFIG_USB0_VBUS_PIN="PH17"
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CONFIG_USB0_VBUS_DET="PH22"
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CONFIG_USB0_VBUS_DET="PH22"
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CONFIG_USB0_ID_DET="PH19"
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CONFIG_USB0_ID_DET="PH19"
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CONFIG_VIDEO_VGA=y
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CONFIG_VIDEO_VGA=y
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CONFIG_SATAPWR="PH12"
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CONFIG_GMAC_TX_DELAY=1
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CONFIG_GMAC_TX_DELAY=1
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
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CONFIG_SPL=y
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CONFIG_SPL=y
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CONFIG_MACH_SUN7I=y
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CONFIG_MACH_SUN7I=y
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CONFIG_DRAM_CLK=480
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CONFIG_DRAM_CLK=480
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CONFIG_SATAPWR="PB8"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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CONFIG_MACH_SUN7I=y
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CONFIG_MACH_SUN7I=y
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CONFIG_DRAM_CLK=432
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CONFIG_DRAM_CLK=432
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CONFIG_MACPWR="PH23"
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CONFIG_MACPWR="PH23"
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CONFIG_SATAPWR="PB3"
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CONFIG_GMAC_TX_DELAY=4
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CONFIG_GMAC_TX_DELAY=4
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_DRAM_CLK=408
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CONFIG_DRAM_CLK=408
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CONFIG_DRAM_ZQ=122
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CONFIG_DRAM_ZQ=122
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CONFIG_USB1_VBUS_PIN="PH11"
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CONFIG_USB1_VBUS_PIN="PH11"
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CONFIG_SATAPWR="PH2"
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CONFIG_GMAC_TX_DELAY=3
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CONFIG_GMAC_TX_DELAY=3
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_MACH_SUN7I=y
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CONFIG_MACH_SUN7I=y
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CONFIG_DRAM_CLK=480
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CONFIG_DRAM_CLK=480
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CONFIG_DRAM_ZQ=122
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CONFIG_DRAM_ZQ=122
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CONFIG_SATAPWR="PH2"
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CONFIG_AHCI=y
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CONFIG_AHCI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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CONFIG_USB0_ID_DET="PH11"
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CONFIG_USB0_ID_DET="PH11"
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CONFIG_USB1_VBUS_PIN="PD24"
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CONFIG_USB1_VBUS_PIN="PD24"
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CONFIG_AXP_GPIO=y
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CONFIG_AXP_GPIO=y
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CONFIG_SATAPWR="PD25"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_CONSOLE_MUX=y
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CONFIG_CONSOLE_MUX=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_REALTEK=y
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CONFIG_MACPWR="PD6"
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CONFIG_MACPWR="PD6"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB1_VBUS_PIN="PG13"
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CONFIG_USB1_VBUS_PIN="PG13"
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CONFIG_SATAPWR="PG11"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SY8106A_POWER=y
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CONFIG_SY8106A_POWER=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB3_VBUS_PIN="PG11"
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@ -7,6 +7,7 @@
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <power/regulator.h>
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#define AHCI_PHYCS0R 0x00c0
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#define AHCI_PHYCS0R 0x00c0
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#define AHCI_PHYCS1R 0x00c4
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#define AHCI_PHYCS1R 0x00c4
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@ -74,6 +75,7 @@ static int sunxi_ahci_phy_init(u8 *reg_base)
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static int sunxi_sata_probe(struct udevice *dev)
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static int sunxi_sata_probe(struct udevice *dev)
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{
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{
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struct udevice *reg_dev;
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ulong base;
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ulong base;
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u8 *reg;
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u8 *reg;
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int ret;
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int ret;
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@ -89,6 +91,13 @@ static int sunxi_sata_probe(struct udevice *dev)
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debug("%s: Failed to init phy (err=%d)\n", __func__, ret);
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debug("%s: Failed to init phy (err=%d)\n", __func__, ret);
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return ret;
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return ret;
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}
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}
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ret = device_get_supply_regulator(dev, "target-supply", ®_dev);
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if (ret == 0) {
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regulator_set_enable(reg_dev, true);
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mdelay(500);
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}
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ret = ahci_probe_scsi(dev, base);
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ret = ahci_probe_scsi(dev, base);
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if (ret) {
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if (ret) {
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debug("%s: Failed to probe (err=%d)\n", __func__, ret);
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debug("%s: Failed to probe (err=%d)\n", __func__, ret);
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