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Merge branch 'master' of git://git.denx.de/u-boot-ti

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This commit is contained in:
Wolfgang Denk 2010-08-12 23:08:05 +02:00
commit ae37a0704a
86 changed files with 308 additions and 330 deletions
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8
README
View file

@ -3158,10 +3158,10 @@ List of environment variables (most likely not complete):
interface is currently active. For example you
can do the following
=> setenv ethact FEC ETHERNET
=> ping 192.168.0.1 # traffic sent on FEC ETHERNET
=> setenv ethact SCC ETHERNET
=> ping 10.0.0.1 # traffic sent on SCC ETHERNET
=> setenv ethact FEC
=> ping 192.168.0.1 # traffic sent on FEC
=> setenv ethact SCC
=> ping 10.0.0.1 # traffic sent on SCC
ethrotate - When set to "no" U-Boot does not go through all
available network interfaces.

4
arch/arm/cpu/arm920t/at91rm9200/ether.c
View file

@ -283,7 +283,7 @@ void eth_halt (void)
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
int at91rm9200_miiphy_read(char *devname, unsigned char addr,
int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
@ -292,7 +292,7 @@ int at91rm9200_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int at91rm9200_miiphy_write(char *devname, unsigned char addr,
int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);

4
arch/arm/cpu/ixp/npe/include/npe.h
View file

@ -82,9 +82,9 @@ struct npe {
/*
* prototypes...
*/
extern int npe_miiphy_read (char *devname, unsigned char addr,
extern int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
extern int npe_miiphy_write (char *devname, unsigned char addr,
extern int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* ifndef NPE_H */

4
arch/arm/cpu/ixp/npe/miiphy.c
View file

@ -100,7 +100,7 @@ int phy_setup_aneg (char *devname, unsigned char addr)
}
int npe_miiphy_read (char *devname, unsigned char addr,
int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
u16 val;
@ -112,7 +112,7 @@ int npe_miiphy_read (char *devname, unsigned char addr,
} /* phy_read */
int npe_miiphy_write (char *devname, unsigned char addr,
int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
ixEthAccMiiWriteRtn(addr, reg, value);

4
arch/m68k/include/asm/fec.h
View file

@ -357,9 +357,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear);
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
int mcffec_miiphy_read(char *devname, unsigned char addr,
int mcffec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int mcffec_miiphy_write(char *devname, unsigned char addr,
int mcffec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif

4
arch/mips/cpu/au1x00_eth.c
View file

@ -89,7 +89,7 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
int au1x00_miiphy_read(char *devname, unsigned char addr,
int au1x00_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
@ -122,7 +122,7 @@ int au1x00_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int au1x00_miiphy_write(char *devname, unsigned char addr,
int au1x00_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);

10
arch/powerpc/cpu/mpc8220/fec.c
View file

@ -34,8 +34,8 @@ typedef struct {
u8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data);
int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal);
int fec8220_miiphy_write (const char *devname, u8 phyAddr, u8 regAddr, u16 data);
/********************************************************************/
#ifdef DEBUG
@ -840,7 +840,7 @@ int mpc8220_fec_initialize (bd_t * bis)
dev->send = mpc8220_fec_send;
dev->recv = mpc8220_fec_recv;
sprintf (dev->name, "FEC ETHERNET");
sprintf (dev->name, "FEC");
eth_register (dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
@ -881,7 +881,7 @@ int mpc8220_fec_initialize (bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
@ -925,7 +925,7 @@ int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
}
/********************************************************************/
int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
int fec8220_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */

2
arch/powerpc/cpu/mpc8260/ether_fcc.c
View file

@ -383,7 +383,7 @@ int fec_initialize(bd_t *bis)
dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
sprintf(dev->name, "FCC%d ETHERNET",
sprintf(dev->name, "FCC%d",
ether_fcc_info[i].ether_index + 1);
dev->priv = &ether_fcc_info[i];
dev->init = fec_init;

2
arch/powerpc/cpu/mpc8260/ether_scc.c
View file

@ -375,7 +375,7 @@ int mpc82xx_scc_enet_initialize(bd_t *bis)
dev = (struct eth_device *) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
sprintf(dev->name, "SCC ETHERNET");
sprintf(dev->name, "SCC");
dev->init = sec_init;
dev->halt = sec_halt;
dev->send = sec_send;

2
arch/powerpc/cpu/mpc85xx/ether_fcc.c
View file

@ -446,7 +446,7 @@ int fec_initialize(bd_t *bis)
dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
sprintf(dev->name, "FCC%d ETHERNET",
sprintf(dev->name, "FCC%d",
ether_fcc_info[i].ether_index + 1);
dev->priv = &ether_fcc_info[i];
dev->init = fec_init;

12
arch/powerpc/cpu/mpc8xx/fec.c
View file

@ -63,9 +63,9 @@ DECLARE_GLOBAL_DATA_PTR;
static int mii_discover_phy(struct eth_device *dev);
#endif
int fec8xx_miiphy_read(char *devname, unsigned char addr,
int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int fec8xx_miiphy_write(char *devname, unsigned char addr,
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static struct ether_fcc_info_s
@ -164,9 +164,9 @@ int fec_initialize(bd_t *bis)
/* for FEC1 make sure that the name of the interface is the same
as the old one for compatibility reasons */
if (i == 0) {
sprintf (dev->name, "FEC ETHERNET");
sprintf (dev->name, "FEC");
} else {
sprintf (dev->name, "FEC%d ETHERNET",
sprintf (dev->name, "FEC%d",
ether_fcc_info[i].ether_index + 1);
}
@ -990,7 +990,7 @@ void mii_init (void)
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
int fec8xx_miiphy_read(char *devname, unsigned char addr,
int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
@ -1007,7 +1007,7 @@ int fec8xx_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int fec8xx_miiphy_write(char *devname, unsigned char addr,
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
short rdreg; /* register working value */

2
arch/powerpc/cpu/mpc8xx/scc.c
View file

@ -77,7 +77,7 @@ int scc_initialize(bd_t *bis)
dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
sprintf(dev->name, "SCC ETHERNET");
sprintf(dev->name, "SCC");
dev->iobase = 0;
dev->priv = 0;
dev->init = scc_init;

4
arch/powerpc/cpu/ppc4xx/miiphy.c
View file

@ -338,7 +338,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value)
return 0;
}
int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
unsigned long sta_reg;
@ -359,7 +359,7 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
/* write a phy reg and return the value with a rc */
/***********************************************************/
int emac4xx_miiphy_write (char *devname, unsigned char addr, unsigned char reg,
int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);

9
board/esd/ar405/config.mk
View file

@ -20,11 +20,4 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# esd AR405 boards
#
#TEXT_BASE = 0xFFFE0000
#TEXT_BASE = 0xFFFD0000
TEXT_BASE = 0xFFFC0000
TEXT_BASE = 0xFFFA0000

8
board/esd/canbt/config.mk
View file

@ -20,10 +20,4 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# esd ADCIOP boards
#
TEXT_BASE = 0xFFFE0000
#TEXT_BASE = 0xFFFD0000
TEXT_BASE = 0xFFFC0000

2
board/esd/pmc440/config.mk
View file

@ -23,7 +23,7 @@
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
TEXT_BASE = 0xFFFA0000
TEXT_BASE = 0xFFF90000
endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1

6
board/evb64260/eth.c
View file

@ -89,7 +89,7 @@ static const char ether_port_phy_addr[3]={4,5,6};
/* MII PHY access routines are common for all i/f, use gal_ent0 */
#define GT6426x_MII_DEVNAME "gal_enet0"
int gt6426x_miiphy_read(char *devname, unsigned char phy,
int gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val);
static inline unsigned short
@ -345,7 +345,7 @@ gt6426x_eth_disable(void *v)
MII utilities - write: write to an MII register via SMI
***************************************************************************/
int
gt6426x_miiphy_write(char *devname, unsigned char phy,
gt6426x_miiphy_write(const char *devname, unsigned char phy,
unsigned char reg, unsigned short data)
{
unsigned int temp= (reg<<21) | (phy<<16) | data;
@ -360,7 +360,7 @@ gt6426x_miiphy_write(char *devname, unsigned char phy,
MII utilities - read: read from an MII register via SMI
***************************************************************************/
int
gt6426x_miiphy_read(char *devname, unsigned char phy,
gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val)
{
unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;

2
board/freescale/mpc8560ads/mpc8560ads.c
View file

@ -236,7 +236,7 @@ void reset_phy (void)
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
miiphy_reset("FCC1 ETHERNET", 0x0);
miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);

2
board/funkwerk/vovpn-gw/vovpn-gw.c
View file

@ -198,7 +198,7 @@ void reset_phy (void)
iop->pdat |= 0x00080000;
for (i=0; i<100; i++) {
udelay(20000);
if (bb_miiphy_read("FCC1 ETHERNET", CONFIG_SYS_PHY_ADDR,2,&val ) == 0) {
if (bb_miiphy_read("FCC1", CONFIG_SYS_PHY_ADDR,2,&val ) == 0) {
break;
}
}

4
board/keymile/common/keymile_hdlc_enet.c
View file

@ -40,7 +40,7 @@ extern char keymile_slot; /* our slot number in the backplane */
#define TOUT_LOOP 50000
/*
* Since, except during initialization, ethact is always HDLC ETHERNET
* Since, except during initialization, ethact is always HDLC
* while we're in the driver, just use serial_printf() everywhere for
* output. This avoids possible conflicts when netconsole is being
* used.
@ -124,7 +124,7 @@ int keymile_hdlc_enet_initialize(bd_t *bis)
seth = dev;
#endif
sprintf(dev->name, "HDLC ETHERNET");
sprintf(dev->name, "HDLC");
dev->init = keymile_hdlc_enet_init;
dev->halt = keymile_hdlc_enet_halt;
dev->send = keymile_hdlc_enet_send;

2
board/keymile/km8xx/km8xx_hdlc_enet.c
View file

@ -34,7 +34,7 @@
char keymile_slot; /* our slot number in the backplane */
/*
* Since, except during initialization, ethact is always HDLC ETHERNET
* Since, except during initialization, ethact is always HDLC
* while we're in the driver, just use serial_printf() everywhere for
* output. This avoids possible conflicts when netconsole is being
* used.

4
board/motionpro/motionpro.c
View file

@ -90,8 +90,8 @@ void reset_phy(void)
{
unsigned short mode_control;
miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control);
miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15,
miiphy_read("FEC", CONFIG_PHY_ADDR, 0x15, &mode_control);
miiphy_write("FEC", CONFIG_PHY_ADDR, 0x15,
mode_control & 0xfffe);
return;
}

8
board/prodrive/p3mx/mv_eth.c
View file

@ -99,9 +99,9 @@ int mv64460_eth_receive (struct eth_device *dev);
int mv64460_eth_xmit (struct eth_device *, volatile void *packet, int length);
int mv_miiphy_read(char *devname, unsigned char phy_addr,
int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value);
int mv_miiphy_write(char *devname, unsigned char phy_addr,
int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value);
int phy_setup_aneg (char *devname, unsigned char addr);
@ -2544,7 +2544,7 @@ static bool eth_port_read_smi_reg (ETH_PORT eth_port_num,
return true;
}
int mv_miiphy_read(char *devname, unsigned char phy_addr,
int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value)
{
unsigned int reg_value;
@ -2629,7 +2629,7 @@ static bool eth_port_write_smi_reg (ETH_PORT eth_port_num,
return true;
}
int mv_miiphy_write(char *devname, unsigned char phy_addr,
int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value)
{
unsigned int reg_value;

2
board/sbc8560/sbc8560.c
View file

@ -225,7 +225,7 @@ void reset_phy (void)
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
miiphy_reset("FCC1 ETHERNET", 0x0);
miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);

2
board/sc3/config.mk
View file

@ -21,4 +21,4 @@
# MA 02111-1307 USA
#
TEXT_BASE = 0xFFFC0000
TEXT_BASE = 0xFFFA0000

2
board/stx/stxgp3/stxgp3.c
View file

@ -239,7 +239,7 @@ reset_phy(void)
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
miiphy_reset("FCC1 ETHERNET", 0x0);
miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);

2
board/stx/stxssa/stxssa.c
View file

@ -238,7 +238,7 @@ reset_phy(void)
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
/* reset PHY */
miiphy_reset("FCC1 ETHERNET", 0x0);
miiphy_reset("FCC1", 0x0);
/* change PHY address to 0x02 */
bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);

6
board/stx/stxxtc/stxxtc.c
View file

@ -481,12 +481,12 @@ void reset_phys(void)
mii_init();
for (phyno = 0; phyno < 32; ++phyno) {
miiphy_read("FEC ETHERNET", phyno, PHY_PHYIDR1, &v);
miiphy_read("FEC", phyno, PHY_PHYIDR1, &v);
if (v == 0xFFFF)
continue;
miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_POWD);
miiphy_write("FEC", phyno, PHY_BMCR, PHY_BMCR_POWD);
udelay(10000);
miiphy_write("FEC ETHERNET", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
miiphy_write("FEC", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
udelay(10000);
}
}

4
board/tqc/tqm8xx/tqm8xx.c
View file

@ -745,13 +745,13 @@ int last_stage_init(void)
return 0;
for (i = 0; i < 2; i++) {
ret = miiphy_read("FEC ETHERNET", phy[i], PHY_BMCR, &reg);
ret = miiphy_read("FEC", phy[i], PHY_BMCR, &reg);
if (ret) {
printf("Cannot read BMCR on PHY %d\n", phy[i]);
return 0;
}
/* Auto-negotiation off, hard set full duplex, 100Mbps */
ret = miiphy_write("FEC ETHERNET", phy[i],
ret = miiphy_write("FEC", phy[i],
PHY_BMCR, (reg | PHY_BMCR_100MB |
PHY_BMCR_DPLX) & ~PHY_BMCR_AUTON);
if (ret) {

2
common/cmd_mii.c
View file

@ -299,7 +299,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
unsigned char addr, reg;
unsigned short data;
int rcode = 0;
char *devname;
const char *devname;
if (argc < 2)
return cmd_usage(cmdtp);

155
common/miiphyutil.c
View file

@ -46,21 +46,45 @@
struct mii_dev {
struct list_head link;
char *name;
int (*read) (char *devname, unsigned char addr,
const char *name;
int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int (*write) (char *devname, unsigned char addr,
int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
};
static struct list_head mii_devs;
static struct mii_dev *current_mii;
/*
* Lookup the mii_dev struct by the registered device name.
*/
static struct mii_dev *miiphy_get_dev_by_name(const char *devname, int quiet)
{
struct list_head *entry;
struct mii_dev *dev;
if (!devname) {
printf("NULL device name!\n");
return NULL;
}
list_for_each(entry, &mii_devs) {
dev = list_entry(entry, struct mii_dev, link);
if (strcmp(dev->name, devname) == 0)
return dev;
}
if (!quiet)
printf("No such device: %s\n", devname);
return NULL;
}
/*****************************************************************************
*
* Initialize global data. Need to be called before any other miiphy routine.
*/
void miiphy_init ()
void miiphy_init(void)
{
INIT_LIST_HEAD (&mii_devs);
current_mii = NULL;
@ -70,25 +94,21 @@ void miiphy_init ()
*
* Register read and write MII access routines for the device <name>.
*/
void miiphy_register (char *name,
int (*read) (char *devname, unsigned char addr,
void miiphy_register(const char *name,
int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
int (*write) (char *devname, unsigned char addr,
int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value))
{
struct list_head *entry;
struct mii_dev *new_dev;
struct mii_dev *miidev;
unsigned int name_len;
char *new_name;
/* check if we have unique name */
list_for_each (entry, &mii_devs) {
miidev = list_entry (entry, struct mii_dev, link);
if (strcmp (miidev->name, name) == 0) {
printf ("miiphy_register: non unique device name "
"'%s'\n", name);
return;
}
new_dev = miiphy_get_dev_by_name(name, 1);
if (new_dev) {
printf("miiphy_register: non unique device name '%s'\n", name);
return;
}
/* allocate memory */
@ -107,9 +127,9 @@ void miiphy_register (char *name,
INIT_LIST_HEAD (&new_dev->link);
new_dev->read = read;
new_dev->write = write;
new_dev->name = (char *)(new_dev + 1);
strncpy (new_dev->name, name, name_len);
new_dev->name[name_len] = '\0';
new_dev->name = new_name = (char *)(new_dev + 1);
strncpy (new_name, name, name_len);
new_name[name_len] = '\0';
debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
new_dev->name, new_dev->read, new_dev->write);
@ -121,25 +141,20 @@ void miiphy_register (char *name,
current_mii = new_dev;
}
int miiphy_set_current_dev (char *devname)
int miiphy_set_current_dev(const char *devname)
{
struct list_head *entry;
struct mii_dev *dev;
list_for_each (entry, &mii_devs) {
dev = list_entry (entry, struct mii_dev, link);
if (strcmp (devname, dev->name) == 0) {
current_mii = dev;
return 0;
}
dev = miiphy_get_dev_by_name(devname, 0);
if (dev) {
current_mii = dev;
return 0;
}
printf ("No such device: %s\n", devname);
return 1;
}
char *miiphy_get_current_dev ()
const char *miiphy_get_current_dev(void)
{
if (current_mii)
return current_mii->name;
@ -147,6 +162,20 @@ char *miiphy_get_current_dev ()
return NULL;
}
static struct mii_dev *miiphy_get_active_dev(const char *devname)
{
/* If the current mii is the one we want, return it */
if (current_mii)
if (strcmp(current_mii->name, devname) == 0)
return current_mii;
/* Otherwise, set the active one to the one we want */
if (miiphy_set_current_dev(devname))
return NULL;
else
return current_mii;
}
/*****************************************************************************
*
* Read to variable <value> from the PHY attached to device <devname>,
@ -155,33 +184,16 @@ char *miiphy_get_current_dev ()
* Returns:
* 0 on success
*/
int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
struct list_head *entry;
struct mii_dev *dev;
int found_dev = 0;
int read_ret = 0;
if (!devname) {
printf ("NULL device name!\n");
return 1;
}
dev = miiphy_get_active_dev(devname);
if (dev)
return dev->read(devname, addr, reg, value);
list_for_each (entry, &mii_devs) {
dev = list_entry (entry, struct mii_dev, link);
if (strcmp (devname, dev->name) == 0) {
found_dev = 1;
read_ret = dev->read (devname, addr, reg, value);
break;
}
}
if (found_dev == 0)
printf ("No such device: %s\n", devname);
return ((found_dev) ? read_ret : 1);
return 1;
}
/*****************************************************************************
@ -192,33 +204,16 @@ int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
* Returns:
* 0 on success
*/
int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
struct list_head *entry;
struct mii_dev *dev;
int found_dev = 0;
int write_ret = 0;
if (!devname) {
printf ("NULL device name!\n");
return 1;
}
dev = miiphy_get_active_dev(devname);
if (dev)
return dev->write(devname, addr, reg, value);
list_for_each (entry, &mii_devs) {
dev = list_entry (entry, struct mii_dev, link);
if (strcmp (devname, dev->name) == 0) {
found_dev = 1;
write_ret = dev->write (devname, addr, reg, value);
break;
}
}
if (found_dev == 0)
printf ("No such device: %s\n", devname);
return ((found_dev) ? write_ret : 1);
return 1;
}
/*****************************************************************************
@ -252,7 +247,7 @@ void miiphy_listdev (void)
* Returns:
* 0 on success
*/
int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev)
{
unsigned int reg = 0;
@ -290,7 +285,7 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
* Returns:
* 0 on success
*/
int miiphy_reset (char *devname, unsigned char addr)
int miiphy_reset(const char *devname, unsigned char addr)
{
unsigned short reg;
int timeout = 500;
@ -332,7 +327,7 @@ int miiphy_reset (char *devname, unsigned char addr)
*
* Determine the ethernet speed (10/100/1000). Return 10 on error.
*/
int miiphy_speed (char *devname, unsigned char addr)
int miiphy_speed(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
@ -386,7 +381,7 @@ miiphy_read_failed:
*
* Determine full/half duplex. Return half on error.
*/
int miiphy_duplex (char *devname, unsigned char addr)
int miiphy_duplex(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
@ -446,7 +441,7 @@ miiphy_read_failed:
* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
* 1000BASE-T, or on error.
*/
int miiphy_is_1000base_x (char *devname, unsigned char addr)
int miiphy_is_1000base_x(const char *devname, unsigned char addr)
{
#if defined(CONFIG_PHY_GIGE)
u16 exsr;
@ -467,7 +462,7 @@ int miiphy_is_1000base_x (char *devname, unsigned char addr)
*
* Determine link status
*/
int miiphy_link (char *devname, unsigned char addr)
int miiphy_link(const char *devname, unsigned char addr)
{
unsigned short reg;

30
disk/part.c
View file

@ -109,13 +109,30 @@ block_dev_desc_t *get_dev(char* ifname, int dev)
/*
* reports device info to the user
*/
#ifdef CONFIG_LBA48
typedef uint64_t lba512_t;
#else
typedef lbaint_t lba512_t;
#endif
/*
* Overflowless variant of (block_count * mul_by / div_by)
* when div_by > mul_by
*/
static lba512_t lba512_muldiv (lba512_t block_count, lba512_t mul_by, lba512_t div_by)
{
lba512_t bc_quot, bc_rem;
/* x * m / d == x / d * m + (x % d) * m / d */
bc_quot = block_count / div_by;
bc_rem = block_count - div_by * bc_quot;
return bc_quot * mul_by + (bc_rem * mul_by) / div_by;
}
void dev_print (block_dev_desc_t *dev_desc)
{
#ifdef CONFIG_LBA48
uint64_t lba512; /* number of blocks if 512bytes block size */
#else
lbaint_t lba512;
#endif
lba512_t lba512; /* number of blocks if 512bytes block size */
if (dev_desc->type == DEV_TYPE_UNKNOWN) {
puts ("not available\n");
@ -184,8 +201,9 @@ void dev_print (block_dev_desc_t *dev_desc)
lba = dev_desc->lba;
lba512 = (lba * (dev_desc->blksz/512));
mb = (10 * lba512) / 2048; /* 2048 = (1024 * 1024) / 512 MB */
/* round to 1 digit */
mb = lba512_muldiv(lba512, 10, 2048); /* 2048 = (1024 * 1024) / 512 MB */
mb_quot = mb / 10;
mb_rem = mb - (10 * mb_quot);

2
doc/README.kmeter1
View file

@ -51,7 +51,7 @@ Keymile kmeter1 Board
tftp 10000 u-boot.bin
=> run load
Using FSL UEC0 device
Using UEC0 device
TFTP from server 192.168.1.1; our IP address is 192.168.205.4
Filename '/tftpboot/kmeter1/u-boot.bin'.
Load address: 0x200000

4
doc/uImage.FIT/howto.txt
View file

@ -93,7 +93,7 @@ nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath}
addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off panic=1
=> run nfsargs addip
=> tftp 900000 /path/to/tftp/location/kernel.itb
Using FEC ETHERNET device
Using FEC device
TFTP from server 192.168.1.1; our IP address is 192.168.160.5
Filename '/path/to/tftp/location/kernel.itb'.
Load address: 0x900000
@ -207,7 +207,7 @@ inspected and booted:
[on the target system]
=> tftp 900000 /path/to/tftp/location/kernel_fdt.itb
Using FEC ETHERNET device
Using FEC device
TFTP from server 192.168.1.1; our IP address is 192.168.160.5
Filename '/path/to/tftp/location/kernel_fdt.itb'.
Load address: 0x900000

68
drivers/mmc/omap3_mmc.c
View file

@ -33,7 +33,7 @@
#include "omap3_mmc.h"
const unsigned short mmc_transspeed_val[15][4] = {
static const unsigned short mmc_transspeed_val[15][4] = {
{CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)},
{CLKD(12, 1), CLKD(12, 10), CLKD(12, 100), CLKD(12, 1000)},
{CLKD(13, 1), CLKD(13, 10), CLKD(13, 100), CLKD(13, 1000)},
@ -51,7 +51,7 @@ const unsigned short mmc_transspeed_val[15][4] = {
{CLKD(80, 1), CLKD(80, 10), CLKD(80, 100), CLKD(80, 1000)}
};
mmc_card_data cur_card_data;
static mmc_card_data cur_card_data;
static block_dev_desc_t mmc_blk_dev;
static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
@ -80,7 +80,7 @@ block_dev_desc_t *mmc_get_dev(int dev)
return (block_dev_desc_t *) &mmc_blk_dev;
}
unsigned char mmc_board_init(void)
static unsigned char mmc_board_init(void)
{
#if defined(CONFIG_TWL4030_POWER)
twl4030_power_mmc_init();
@ -114,7 +114,7 @@ unsigned char mmc_board_init(void)
return 1;
}
void mmc_init_stream(void)
static void mmc_init_stream(void)
{
writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con);
@ -129,7 +129,7 @@ void mmc_init_stream(void)
writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
}
unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
static unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
{
unsigned int val;
@ -158,7 +158,7 @@ unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
return 1;
}
unsigned char mmc_init_setup(void)
static unsigned char mmc_init_setup(void)
{
unsigned int reg_val;
@ -192,7 +192,7 @@ unsigned char mmc_init_setup(void)
return 1;
}
unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
static unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
unsigned int *response)
{
unsigned int mmc_stat;
@ -228,7 +228,7 @@ unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
return 1;
}
unsigned char mmc_read_data(unsigned int *output_buf)
static unsigned char mmc_read_data(unsigned int *output_buf)
{
unsigned int mmc_stat;
unsigned int read_count = 0;
@ -269,7 +269,7 @@ unsigned char mmc_read_data(unsigned int *output_buf)
return 1;
}
unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
static unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
{
unsigned char err;
unsigned int argument = 0;
@ -380,7 +380,7 @@ unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
return 1;
}
unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
static unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
mmc_csd_reg_t *cur_csd)
{
mmc_extended_csd_reg_t ext_csd;
@ -434,45 +434,48 @@ unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
return 1;
}
unsigned char omap_mmc_read_sect(unsigned int start_sec, unsigned int num_bytes,
mmc_card_data *mmc_c,
unsigned long *output_buf)
static unsigned long mmc_bread(int dev_num, unsigned long blknr,
lbaint_t blkcnt, void *dst)
{
unsigned char err;
unsigned int argument;
unsigned int resp[4];
unsigned int num_sec_val =
(num_bytes + (MMCSD_SECTOR_SIZE - 1)) / MMCSD_SECTOR_SIZE;
unsigned int *output_buf = dst;
unsigned int sec_inc_val;
lbaint_t i;
if (num_sec_val == 0)
return 1;
if (blkcnt == 0)
return 0;
if (mmc_c->mode == SECTOR_MODE) {
argument = start_sec;
if (cur_card_data.mode == SECTOR_MODE) {
argument = blknr;
sec_inc_val = 1;
} else {
argument = start_sec * MMCSD_SECTOR_SIZE;
argument = blknr * MMCSD_SECTOR_SIZE;
sec_inc_val = MMCSD_SECTOR_SIZE;
}
while (num_sec_val) {
for (i = 0; i < blkcnt; i++) {
err = mmc_send_cmd(MMC_CMD17, argument, resp);
if (err != 1)
return err;
if (err != 1) {
printf("mmc: CMD17 failed, status = %08x\n", err);
break;
}
err = mmc_read_data((unsigned int *) output_buf);
if (err != 1)
return err;
err = mmc_read_data(output_buf);
if (err != 1) {
printf("mmc: read failed, status = %08x\n", err);
break;
}
output_buf += (MMCSD_SECTOR_SIZE / 4);
argument += sec_inc_val;
num_sec_val--;
}
return 1;
return i;
}
unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
static unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
{
unsigned char ret_val;
unsigned int argument;
@ -541,13 +544,6 @@ unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
return 1;
}
unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt,
void *dst)
{
omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data,
(unsigned long *) dst);
return 1;
}
int mmc_legacy_init(int dev)
{

9
drivers/mmc/omap3_mmc.h
View file

@ -230,13 +230,4 @@ typedef union {
mmc_csd_reg_t Card_CSD;
} mmc_resp_t;
extern mmc_card_data mmc_dev;
unsigned char mmc_lowlevel_init(void);
unsigned char mmc_send_command(unsigned int cmd, unsigned int arg,
unsigned int *response);
unsigned char mmc_setup_clock(unsigned int iclk, unsigned short clkd);
unsigned char mmc_set_opendrain(unsigned char state);
unsigned char mmc_read_data(unsigned int *output_buf);
#endif /* MMC_H */

4
drivers/net/4xx_enet.c
View file

@ -305,9 +305,9 @@ static void mal_err (struct eth_device *dev, unsigned long isr,
static void emac_err (struct eth_device *dev, unsigned long isr);
extern int phy_setup_aneg (char *devname, unsigned char addr);
extern int emac4xx_miiphy_read (char *devname, unsigned char addr,
extern int emac4xx_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
extern int emac4xx_miiphy_write (char *devname, unsigned char addr,
extern int emac4xx_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int board_emac_count(void);

4
drivers/net/altera_tse.c
View file

@ -426,7 +426,7 @@ static int tse_mdio_write(struct altera_tse_priv *priv, unsigned int regnum,
/* MDIO access to phy */
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
static int altera_tse_miiphy_write(char *devname, unsigned char addr,
static int altera_tse_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;
@ -439,7 +439,7 @@ static int altera_tse_miiphy_write(char *devname, unsigned char addr,
return 0;
}
static int altera_tse_miiphy_read(char *devname, unsigned char addr,
static int altera_tse_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;

6
drivers/net/at91_emac.c
View file

@ -162,7 +162,7 @@ int at91emac_write(at91_emac_t *at91mac, unsigned char addr,
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
at91_emac_t *get_emacbase_by_name(char *devname)
at91_emac_t *get_emacbase_by_name(const char *devname)
{
struct eth_device *netdev;
@ -170,7 +170,7 @@ at91_emac_t *get_emacbase_by_name(char *devname)
return (at91_emac_t *) netdev->iobase;
}
int at91emac_mii_read(char *devname, unsigned char addr,
int at91emac_mii_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
at91_emac_t *emac;
@ -181,7 +181,7 @@ int at91emac_mii_read(char *devname, unsigned char addr,
}
int at91emac_mii_write(char *devname, unsigned char addr,
int at91emac_mii_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91_emac_t *emac;

4
drivers/net/bfin_mac.c
View file

@ -71,7 +71,7 @@ static int bfin_miiphy_wait(void)
return 0;
}
static int bfin_miiphy_read(char *devname, uchar addr, uchar reg, ushort *val)
static int bfin_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val)
{
if (bfin_miiphy_wait())
return 1;
@ -82,7 +82,7 @@ static int bfin_miiphy_read(char *devname, uchar addr, uchar reg, ushort *val)
return 0;
}
static int bfin_miiphy_write(char *devname, uchar addr, uchar reg, ushort val)
static int bfin_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val)
{
if (bfin_miiphy_wait())
return 1;

4
drivers/net/davinci_emac.c
View file

@ -252,12 +252,12 @@ static int gen_auto_negotiate(int phy_addr)
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
static int davinci_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
{
return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
}
static int davinci_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
{
return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
}

4
drivers/net/designware.c
View file

@ -451,7 +451,7 @@ static int configure_phy(struct eth_device *dev)
}
#if defined(CONFIG_MII)
static int dw_mii_read(char *devname, u8 addr, u8 reg, u16 *val)
static int dw_mii_read(const char *devname, u8 addr, u8 reg, u16 *val)
{
struct eth_device *dev;
@ -462,7 +462,7 @@ static int dw_mii_read(char *devname, u8 addr, u8 reg, u16 *val)
return 0;
}
static int dw_mii_write(char *devname, u8 addr, u8 reg, u16 val)
static int dw_mii_write(const char *devname, u8 addr, u8 reg, u16 val)
{
struct eth_device *dev;

7
drivers/net/eepro100.c
View file

@ -321,7 +321,8 @@ static int set_phyreg (struct eth_device *dev, unsigned char addr,
/* Check if given phyaddr is valid, i.e. there is a PHY connected.
* Do this by checking model value field from ID2 register.
*/
static struct eth_device* verify_phyaddr (char *devname, unsigned char addr)
static struct eth_device* verify_phyaddr (const char *devname,
unsigned char addr)
{
struct eth_device *dev;
unsigned short value;
@ -350,7 +351,7 @@ static struct eth_device* verify_phyaddr (char *devname, unsigned char addr)
return dev;
}
static int eepro100_miiphy_read (char *devname, unsigned char addr,
static int eepro100_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;
@ -367,7 +368,7 @@ static int eepro100_miiphy_read (char *devname, unsigned char addr,
return 0;
}
static int eepro100_miiphy_write (char *devname, unsigned char addr,
static int eepro100_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;

8
drivers/net/ep93xx_eth.c
View file

@ -44,9 +44,9 @@
#define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
/* ep93xx_miiphy ops forward declarations */
static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value);
static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value);
#if defined(EP93XX_MAC_DEBUG)
@ -555,7 +555,7 @@ eth_init_done:
/**
* Read a 16-bit value from an MII register.
*/
static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
@ -607,7 +607,7 @@ static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
/**
* Write a 16-bit value to an MII register.
*/
static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;

6
drivers/net/fec_mxc.c
View file

@ -62,7 +62,7 @@ struct fec_priv gfec = {
/*
* MII-interface related functions
*/
static int fec_miiphy_read(char *dev, uint8_t phyAddr, uint8_t regAddr,
static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t *retVal)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
@ -119,7 +119,7 @@ static void fec_mii_setspeed(struct fec_priv *fec)
debug("fec_init: mii_speed %#lx\n",
fec->eth->mii_speed);
}
static int fec_miiphy_write(char *dev, uint8_t phyAddr, uint8_t regAddr,
static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t data)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
@ -743,7 +743,7 @@ static int fec_probe(bd_t *bd)
writel(0x05ee0024, &fec->eth->r_cntrl); /* FIXME 0x05ee0004 */
fec_mii_setspeed(fec);
sprintf(edev->name, "FEC_MXC");
sprintf(edev->name, "FEC");
miiphy_register(edev->name, fec_miiphy_read, fec_miiphy_write);

4
drivers/net/macb.c
View file

@ -167,7 +167,7 @@ static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
#if defined(CONFIG_CMD_MII)
int macb_miiphy_read(char *devname, u8 phy_adr, u8 reg, u16 *value)
int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);
@ -180,7 +180,7 @@ int macb_miiphy_read(char *devname, u8 phy_adr, u8 reg, u16 *value)
return 0;
}
int macb_miiphy_write(char *devname, u8 phy_adr, u8 reg, u16 value)
int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);

4
drivers/net/mcfmii.c
View file

@ -293,7 +293,7 @@ void __mii_init(void)
* Otherwise they hang in mii_send() !!! Sorry!
*/
int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
int mcffec_miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
short rdreg; /* register working value */
@ -312,7 +312,7 @@ int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
return 0;
}
int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
short rdreg; /* register working value */

10
drivers/net/mpc512x_fec.c
View file

@ -25,8 +25,8 @@ DECLARE_GLOBAL_DATA_PTR;
#error "CONFIG_MII has to be defined!"
#endif
int fec512x_miiphy_read(char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
int fec512x_miiphy_write(char *devname, u8 phyAddr, u8 regAddr, u16 data);
int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data);
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
static uchar rx_buff[FEC_BUFFER_SIZE];
@ -637,7 +637,7 @@ int mpc512x_fec_initialize (bd_t * bis)
dev->send = mpc512x_fec_send;
dev->recv = mpc512x_fec_recv;
sprintf (dev->name, "FEC ETHERNET");
sprintf (dev->name, "FEC");
eth_register (dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
@ -672,7 +672,7 @@ int mpc512x_fec_initialize (bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
@ -719,7 +719,7 @@ int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
}
/********************************************************************/
int fec512x_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;

8
drivers/net/mpc5xxx_fec.c
View file

@ -35,8 +35,8 @@ typedef struct {
uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal);
int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal);
int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis);
@ -941,7 +941,7 @@ int mpc5xxx_fec_initialize(bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
@ -983,7 +983,7 @@ int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * re
}
/********************************************************************/
int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */

4
drivers/net/mvgbe.c
View file

@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
*
* Returns 16bit phy register value, or 0xffff on error
*/
static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
@ -131,7 +131,7 @@ static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
* Returns 0 if write succeed, -EINVAL on bad parameters
* -ETIME on timeout
*/
static int smi_reg_write(char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);

4
drivers/net/ns7520_eth.c
View file

@ -761,7 +761,7 @@ enum mii_status {
/**
* Read a 16-bit value from an MII register.
*/
extern int ns7520_miiphy_read(char *devname, unsigned char const addr,
extern int ns7520_miiphy_read(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short *const value)
{
int ret = MII_STATUS_FAILURE;
@ -807,7 +807,7 @@ extern int ns7520_miiphy_read(char *devname, unsigned char const addr,
/**
* Write a 16-bit value to an MII register.
*/
extern int ns7520_miiphy_write(char *devname, unsigned char const addr,
extern int ns7520_miiphy_write(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
int ret = MII_STATUS_FAILURE;

6
drivers/net/phy/miiphybb.c
View file

@ -143,7 +143,7 @@ void bb_miiphy_init(void)
}
}
static inline struct bb_miiphy_bus *bb_miiphy_getbus(char *devname)
static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname)
{
#ifdef CONFIG_BITBANGMII_MULTI
int i;
@ -246,7 +246,7 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
* Returns:
* 0 on success
*/
int bb_miiphy_read(char *devname, unsigned char addr,
int bb_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
@ -327,7 +327,7 @@ int bb_miiphy_read(char *devname, unsigned char addr,
* Returns:
* 0 on success
*/
int bb_miiphy_write (char *devname, unsigned char addr,
int bb_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct bb_miiphy_bus *bus;

8
drivers/net/tsec.c
View file

@ -60,9 +60,9 @@ static void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd);
static void adjust_link(struct eth_device *dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
static int tsec_miiphy_write(char *devname, unsigned char addr,
static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static int tsec_miiphy_read(char *devname, unsigned char addr,
static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
#endif
#ifdef CONFIG_MCAST_TFTP
@ -1919,7 +1919,7 @@ static void phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd)
* Returns:
* 0 on success
*/
static int tsec_miiphy_read(char *devname, unsigned char addr,
static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
unsigned short ret;
@ -1942,7 +1942,7 @@ static int tsec_miiphy_read(char *devname, unsigned char addr,
* Returns:
* 0 on success
*/
static int tsec_miiphy_write(char *devname, unsigned char addr,
static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct tsec_private *priv = privlist[0];

8
drivers/qe/uec.c
View file

@ -603,7 +603,7 @@ static void phy_change(struct eth_device *dev)
* Returns:
* The index where the device is located, -1 on error
*/
static int uec_miiphy_find_dev_by_name(char *devname)
static int uec_miiphy_find_dev_by_name(const char *devname)
{
int i;
@ -628,7 +628,7 @@ static int uec_miiphy_find_dev_by_name(char *devname)
* Returns:
* 0 on success
*/
static int uec_miiphy_read(char *devname, unsigned char addr,
static int uec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
int devindex = 0;
@ -650,7 +650,7 @@ static int uec_miiphy_read(char *devname, unsigned char addr,
* Returns:
* 0 on success
*/
static int uec_miiphy_write(char *devname, unsigned char addr,
static int uec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
int devindex = 0;
@ -1367,7 +1367,7 @@ int uec_initialize(bd_t *bis, uec_info_t *uec_info)
uec->uec_info = uec_info;
uec->dev = dev;
sprintf(dev->name, "FSL UEC%d", uec_info->uf_info.ucc_num);
sprintf(dev->name, "UEC%d", uec_info->uf_info.ucc_num);
dev->iobase = 0;
dev->priv = (void *)uec;
dev->init = uec_init;

6
drivers/qe/uec_phy.c
View file

@ -71,8 +71,8 @@
* {name, speed, duplex},
*
* #define CONFIG_SYS_FIXED_PHY_PORTS \
* CONFIG_SYS_FIXED_PHY_PORT("FSL UEC0",SPEED_100,DUPLEX_FULL) \
* CONFIG_SYS_FIXED_PHY_PORT("FSL UEC2",SPEED_100,DUPLEX_HALF)
* CONFIG_SYS_FIXED_PHY_PORT("UEC0",SPEED_100,DUPLEX_FULL) \
* CONFIG_SYS_FIXED_PHY_PORT("UEC2",SPEED_100,DUPLEX_HALF)
*/
#ifndef CONFIG_FIXED_PHY
@ -102,7 +102,7 @@ static const struct fixed_phy_port fixed_phy_port[] = {
* Example board header file to define bitbang ethernet ports:
*
* #define CONFIG_SYS_BITBANG_PHY_PORT(name) name,
* #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("FSL UEC0")
* #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("UEC0")
*/
#ifndef CONFIG_SYS_BITBANG_PHY_PORTS
#define CONFIG_SYS_BITBANG_PHY_PORTS /* default is an empty array */

10
include/configs/AR405.h
View file

@ -175,9 +175,9 @@
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFFC0000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
@ -209,11 +209,11 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR 0xFFFB0000 /* Address of Environment Sector*/
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
#define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */
#define CONFIG_ENV_ADDR_REDUND 0xFFFA0000
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
/*

6
include/configs/CANBT.h
View file

@ -120,9 +120,9 @@
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFFE0000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128 kB for Monitor */
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*

2
include/configs/MPC8323ERDB.h
View file

@ -338,7 +338,7 @@
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* ETH3 */

2
include/configs/MPC832XEMDS.h
View file

@ -353,7 +353,7 @@
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* ETH3 */

2
include/configs/MPC8360EMDS.h
View file

@ -390,7 +390,7 @@
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_PHY_MODE_NEED_CHANGE
#define CONFIG_UEC_ETH1 /* GETH1 */

2
include/configs/MPC8360ERDK.h
View file

@ -309,7 +309,7 @@
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* GETH1 */

2
include/configs/MPC8568MDS.h
View file

@ -313,7 +313,7 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_UEC_ETH
#ifndef CONFIG_TSEC_ENET
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#endif
#define CONFIG_PHY_MODE_NEED_CHANGE
#define CONFIG_eTSEC_MDIO_BUS

2
include/configs/MPC8569MDS.h
View file

@ -363,7 +363,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_MIIM_ADDRESS (CONFIG_SYS_CCSRBAR + 0x82120)
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_PHY_MODE_NEED_CHANGE
#define CONFIG_UEC_ETH1 /* GETH1 */

1
include/configs/NSCU.h
View file

@ -485,7 +485,6 @@
#undef CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
/* #define CONFIG_ETHPRIME "FEC ETHERNET" */
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

8
include/configs/PMC440.h
View file

@ -53,7 +53,7 @@
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 256 kB for malloc() */
#define CONFIG_PRAM 0 /* use pram variable to overwrite */
@ -61,7 +61,7 @@
#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
#define CONFIG_SYS_NAND_ADDR 0xd0000000 /* NAND Flash */
#define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
@ -301,8 +301,8 @@
"fdt_addr_r=800000\0" \
"fpga=fpga loadb 0 ${fpga_addr}\0" \
"load=tftp 200000 /tftpboot/pmc440/u-boot.bin\0" \
"update=protect off fffa0000 ffffffff;era fffa0000 ffffffff;" \
"cp.b 200000 fffa0000 60000\0" \
"update=protect off fff90000 ffffffff;era fff90000 ffffffff;" \
"cp.b 200000 fff90000 70000\0" \
""
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */

6
include/configs/TK885D.h
View file

@ -65,8 +65,8 @@
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"ethprime=FEC ETHERNET\0" \
"ethact=FEC ETHERNET\0" \
"ethprime=FEC\0" \
"ethact=FEC\0" \
"netdev=eth0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
@ -514,7 +514,7 @@
#define CONFIG_MII_INIT 1
#define CONFIG_NET_RETRY_COUNT 3
#define CONFIG_ETHPRIME "FEC ETHERNET"
#define CONFIG_ETHPRIME "FEC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM855L.h
View file

@ -481,7 +481,7 @@
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM855M.h
View file

@ -516,7 +516,7 @@
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM860L.h
View file

@ -480,7 +480,7 @@
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM860M.h
View file

@ -484,7 +484,7 @@
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM862L.h
View file

@ -486,7 +486,7 @@
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM862M.h
View file

@ -487,7 +487,7 @@
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM866M.h
View file

@ -506,7 +506,7 @@
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

2
include/configs/TQM885D.h
View file

@ -506,7 +506,7 @@
switching to another netwok (if the
tried network is unreachable) */
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1

6
include/configs/amcc-common.h
View file

@ -278,15 +278,13 @@
"load=tftp 200000 ${u-boot}\0" \
"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
"era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
"cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \
"setenv filesize;saveenv\0" \
"cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}" \
"upd=run load update\0" \
#define CONFIG_AMCC_DEF_ENV_NAND_UPD \
"u-boot-nand=" xstr(CONFIG_HOSTNAME) "/u-boot-nand.bin\0" \
"nload=tftp 200000 ${u-boot-nand}\0" \
"nupdate=nand erase 0 100000;nand write 200000 0 100000;" \
"setenv filesize;saveenv\0" \
"nupdate=nand erase 0 100000;nand write 200000 0 100000" \
"nupd=run nload nupdate\0"
#endif /* __AMCC_COMMON_H */

2
include/configs/ep82xxm.h
View file

@ -147,7 +147,7 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_ENV_IN_OWN_SECT 1
#define CONFIG_AUTO_COMPLETE 1
#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3 ETHERNET"
#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3"
#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */

2
include/configs/idmr.h
View file

@ -74,7 +74,7 @@
"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
"ethact=FEC ETHERNET\0" \
"ethact=FEC\0 " \
"update=prot off ff800000 ff81ffff; era ff800000 ff81ffff; " \
"cp.b 200000 ff800000 $(filesize);" \
"prot on ff800000 ff81ffff\0" \

14
include/configs/katmai.h
View file

@ -53,13 +53,6 @@
#define CONFIG_HOSTNAME katmai
#include "amcc-common.h"
/*
* For booting 256K-paged Linux we should have 16MB of memory
* for Linux initial memory map
*/
#undef CONFIG_SYS_BOOTMAPSZ
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CONFIG_SHOW_BOOT_PROGRESS
@ -188,11 +181,10 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_AMCC_DEF_ENV \
CONFIG_AMCC_DEF_ENV_POWERPC \
CONFIG_AMCC_DEF_ENV_PPC_OLD \
CONFIG_AMCC_DEF_ENV_NOR_UPD \
"kernel_addr=fff10000\0" \
"ramdisk_addr=fff20000\0" \
"kozio=bootm ffc60000\0" \
"kernel_addr=ff000000\0" \
"fdt_addr=ff1e0000\0" \
"ramdisk_addr=ff200000\0" \
"pciconfighost=1\0" \
"pcie_mode=RP:RP:RP\0" \
""

4
include/configs/keymile-common.h
View file

@ -139,8 +139,8 @@
#ifdef CONFIG_IO_MUXING
#define CONFIG_KM_DEF_ENV_IOMUX \
"nc=setenv ethact HDLC ETHERNET \0" \
"nce=setenv ethact SCC ETHERNET \0" \
"nc=setenv ethact HDLC \0" \
"nce=setenv ethact SCC \0" \
"stderr=serial,nc \0" \
"stdin=serial,nc \0" \
"stdout=serial,nc \0" \

2
include/configs/km8xx.h
View file

@ -280,7 +280,7 @@
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SCC3_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#define CONFIG_ETHPRIME "SCC"
#define CONFIG_HAS_ETH0
/* pass open firmware flat tree */

2
include/configs/kmeter1.h
View file

@ -284,7 +284,7 @@
* QE UEC ethernet configuration
*/
#define CONFIG_UEC_ETH
#define CONFIG_ETHPRIME "FSL UEC0"
#define CONFIG_ETHPRIME "UEC0"
#define CONFIG_UEC_ETH1 /* GETH1 */
#define UEC_VERBOSE_DEBUG 1

5
include/configs/sc3.h
View file

@ -379,8 +379,9 @@
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE 0xFFE00000
#define CONFIG_SYS_MONITOR_BASE 0xFFFC0000 /* placed last 256k */
#define CONFIG_SYS_MONITOR_LEN (224 * 1024) /* Reserve 224 KiB for Monitor */
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of U-Boot */
#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KiB for malloc() */
/*

2
include/configs/v38b.h
View file

@ -154,7 +154,7 @@
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath) wdt=off\0" \
"hostname=v38b\0" \
"ethact=FEC ETHERNET\0" \
"ethact=FEC\0" \
"rootpath=/opt/eldk-3.1.1/ppc_6xx\0" \
"update=prot off ff000000 ff03ffff; era ff000000 ff03ffff; " \
"cp.b 200000 ff000000 $(filesize);" \

30
include/miiphy.h
View file

@ -36,30 +36,30 @@
#include <net.h>
int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
int miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value);
int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
int miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value);
int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
int miiphy_info (const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev);
int miiphy_reset (char *devname, unsigned char addr);
int miiphy_speed (char *devname, unsigned char addr);
int miiphy_duplex (char *devname, unsigned char addr);
int miiphy_is_1000base_x (char *devname, unsigned char addr);
int miiphy_reset (const char *devname, unsigned char addr);
int miiphy_speed (const char *devname, unsigned char addr);
int miiphy_duplex (const char *devname, unsigned char addr);
int miiphy_is_1000base_x (const char *devname, unsigned char addr);
#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
int miiphy_link (char *devname, unsigned char addr);
int miiphy_link (const char *devname, unsigned char addr);
#endif
void miiphy_init (void);
void miiphy_register (char *devname,
int (*read) (char *devname, unsigned char addr,
void miiphy_register (const char *devname,
int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
int (*write) (char *devname, unsigned char addr,
int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value));
int miiphy_set_current_dev (char *devname);
char *miiphy_get_current_dev (void);
int miiphy_set_current_dev (const char *devname);
const char *miiphy_get_current_dev (void);
void miiphy_listdev (void);
@ -85,9 +85,9 @@ extern struct bb_miiphy_bus bb_miiphy_buses[];
extern int bb_miiphy_buses_num;
void bb_miiphy_init (void);
int bb_miiphy_read (char *devname, unsigned char addr,
int bb_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int bb_miiphy_write (char *devname, unsigned char addr,
int bb_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif

2
include/net.h
View file

@ -117,7 +117,7 @@ extern void eth_try_another(int first_restart); /* Change the device */
extern void eth_set_current(void); /* set nterface to ethcur var */
#endif
extern struct eth_device *eth_get_dev(void); /* get the current device MAC */
extern struct eth_device *eth_get_dev_by_name(char *devname); /* get device */
extern struct eth_device *eth_get_dev_by_name(const char *devname);
extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
extern int eth_get_dev_index (void); /* get the device index */
extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);

2
net/eth.c
View file

@ -102,7 +102,7 @@ struct eth_device *eth_get_dev(void)
return eth_current;
}
struct eth_device *eth_get_dev_by_name(char *devname)
struct eth_device *eth_get_dev_by_name(const char *devname)
{
struct eth_device *dev, *target_dev;