Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-03-16 23:07:00 +00:00
Code Issues Projects Releases Packages Wiki Activity

net: sun8i_emac: Remove non-DM pin setup

Browse source 
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Samuel Holland 2021-08-28 11:49:40 -05:00 • committed by Andre Przywara
parent 37b3de432f
commit ae022e8366
1 changed files with 0 additions and 90 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

90
drivers/net/sun8i_emac.c
View file

@ -29,7 +29,6 @@
#include <miiphy.h>
#include <net.h>
#include <reset.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <wait_bit.h>
#define MDIO_CMD_MII_BUSY BIT(0)
@ -81,13 +80,6 @@
#define AHB_GATE_OFFSET_EPHY 0
/* IO mux settings */
#define SUN8I_IOMUX_H3 2
#define SUN8I_IOMUX_R40 5
#define SUN8I_IOMUX_H6 5
#define SUN8I_IOMUX_H616 2
#define SUN8I_IOMUX 4
/* H3/A64 EMAC Register's offset */
#define EMAC_CTL0 0x00
#define EMAC_CTL0_FULL_DUPLEX BIT(0)
@ -519,85 +511,6 @@ static int sun8i_emac_eth_start(struct udevice *dev)
return 0;
}
static int parse_phy_pins(struct udevice *dev)
{
int offset;
const char *pin_name;
int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
u32 iomux;
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
"pinctrl-0");
if (offset < 0) {
printf("WARNING: emac: cannot find pinctrl-0 node\n");
return offset;
}
drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
"drive-strength", ~0);
if (drive != ~0) {
if (drive <= 10)
drive = SUN4I_PINCTRL_10_MA;
else if (drive <= 20)
drive = SUN4I_PINCTRL_20_MA;
else if (drive <= 30)
drive = SUN4I_PINCTRL_30_MA;
else
drive = SUN4I_PINCTRL_40_MA;
}
if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL))
pull = SUN4I_PINCTRL_PULL_UP;
else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL))
pull = SUN4I_PINCTRL_PULL_DOWN;
/*
* The GPIO pinmux value is an integration choice, so depends on the
* SoC, not the EMAC variant.
*/
if (IS_ENABLED(CONFIG_MACH_SUNXI_H3_H5))
iomux = SUN8I_IOMUX_H3;
else if (IS_ENABLED(CONFIG_MACH_SUN8I_R40))
iomux = SUN8I_IOMUX_R40;
else if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
iomux = SUN8I_IOMUX_H6;
else if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
iomux = SUN8I_IOMUX_H616;
else if (IS_ENABLED(CONFIG_MACH_SUN8I_A83T))
iomux = SUN8I_IOMUX;
else if (IS_ENABLED(CONFIG_MACH_SUN50I))
iomux = SUN8I_IOMUX;
else
BUILD_BUG_ON_MSG(1, "missing pinmux value for Ethernet pins");
for (i = 0; ; i++) {
int pin;
pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
"pins", i, NULL);
if (!pin_name)
break;
pin = sunxi_name_to_gpio(pin_name);
if (pin < 0)
continue;
sunxi_gpio_set_cfgpin(pin, iomux);
if (drive != ~0)
sunxi_gpio_set_drv(pin, drive);
if (pull != ~0)
sunxi_gpio_set_pull(pin, pull);
}
if (!i) {
printf("WARNING: emac: cannot find pins property\n");
return -2;
}
return 0;
}
static int sun8i_emac_eth_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct emac_eth_dev *priv = dev_get_priv(dev);
@ -965,9 +878,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
priv->interface = pdata->phy_interface;
if (!priv->use_internal_phy)
parse_phy_pins(dev);
sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
"allwinner,tx-delay-ps", 0);
if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)