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rockchip: rk3399-rockpro64: Fix SPL max size and SPI flash payload offset
TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is
loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only
reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for
TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB
Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows
for a payload of 3168 KB before env offset start to overlap.
Also remove CONFIG_LTO=y now that there is sufficient space for SPL in
SPI flash, and to fix a build issue reported by Peter Robinson.
Fixes: 5713135ecc
("rockchip: rockpro64: Build u-boot-rockchip-spi.bin")
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
f40dcc7d1e
commit
ada6328738
2 changed files with 2 additions and 7 deletions
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@ -9,10 +9,6 @@
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdmmc, &sdhci;
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};
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config {
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u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
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};
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};
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&sdhci {
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@ -21,7 +21,6 @@ CONFIG_SPL_SPI=y
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CONFIG_SYS_LOAD_ADDR=0x800800
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CONFIG_PCI=y
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CONFIG_DEBUG_UART=y
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CONFIG_LTO=y
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CONFIG_SPL_FIT_SIGNATURE=y
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CONFIG_LEGACY_IMAGE_FORMAT=y
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CONFIG_BOOTSTAGE=y
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@ -30,7 +29,7 @@ CONFIG_USE_PREBOOT=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_MISC_INIT_R=y
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CONFIG_SPL_MAX_SIZE=0x2e000
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CONFIG_SPL_MAX_SIZE=0x40000
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CONFIG_SPL_PAD_TO=0x7f8000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x400000
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@ -40,7 +39,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
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CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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CONFIG_TPL=y
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CONFIG_CMD_BOOTZ=y
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