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ARM: stm32: Add boot counter to DHSOM

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Add boot counter to STM32MP15xx DHSOM. This aligns the software with
other upstream DHSOM products which already do enable boot counter.

The boot counter on STM32MP15xx is placed in the TAMP block TAMP_BKPxR
register 19, right past register 17 and 18 used for CM4 resource table
and state by the Linux kernel. The TAMP_BKPxR register block is used
because its contents survives warm reset, but not cold reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Marek Vasut 2022-10-27 23:17:55 +02:00 committed by Patrice Chotard
parent 666b1a712d
commit ac803d9cae
2 changed files with 10 additions and 0 deletions
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5
configs/stm32mp15_dhcom_basic_defconfig
View file

@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2"
CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_SPL_MMC=y CONFIG_SPL_MMC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_TARGET_DH_STM32MP1_PDK2=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y
@ -74,6 +76,7 @@ CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y CONFIG_CMD_TIMER=y
@ -99,6 +102,8 @@ CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y CONFIG_TFTP_TSIZE=y
CONFIG_STM32_ADC=y CONFIG_STM32_ADC=y
CONFIG_SPL_BLOCK_CACHE=y CONFIG_SPL_BLOCK_CACHE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_MTD=y CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y

5
configs/stm32mp15_dhcor_basic_defconfig
View file

@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96"
CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_SPL_MMC=y CONFIG_SPL_MMC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_TARGET_DH_STM32MP1_PDK2=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y
@ -72,6 +74,7 @@ CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SYS_DISABLE_AUTOLOAD=y CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y CONFIG_CMD_TIMER=y
@ -96,6 +99,8 @@ CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y CONFIG_TFTP_TSIZE=y
CONFIG_STM32_ADC=y CONFIG_STM32_ADC=y
CONFIG_SPL_BLOCK_CACHE=y CONFIG_SPL_BLOCK_CACHE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
CONFIG_DFU_MMC=y CONFIG_DFU_MMC=y
CONFIG_DFU_MTD=y CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y CONFIG_DFU_RAM=y