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Fixup bug in PMIC TPS65217 register address definition
The addresses of the registers in TI TPS65217 are not continuous. There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17 register available. Fixup the enum values by adding a 'reserved' placeholder to correct the addresses higher than 0x17. Series-to: Heiko Schocher <hs@denx.de> Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
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@ -38,6 +38,7 @@ enum {
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TPS65217_DEFLS1,
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TPS65217_DEFLS2,
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TPS65217_ENABLE,
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TPS65217_RESERVED0, /* no 0x17 register available */
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TPS65217_DEFUVLO,
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TPS65217_SEQ1,
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TPS65217_SEQ2,
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