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OMAP3: Remove unused PHYS_SDRAM_1_SIZE
Remove the unused PHYS_SDRAM_1_SIZE from OMAP3 config files. Signed-off-by: Thomas Weber <thomas@tomweber.eu>
This commit is contained in:
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cdd0729ead
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abcbe2eb00
11 changed files with 0 additions and 11 deletions
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@ -282,7 +282,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
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#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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* FLASH and environment organization
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@ -263,7 +263,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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@ -236,7 +236,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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/*
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@ -323,7 +323,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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/*
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@ -251,7 +251,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define CONFIG_ENV_IS_NOWHERE 1
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#define CONFIG_ENV_IS_NOWHERE 1
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@ -221,7 +221,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define CONFIG_SYS_TEXT_BASE 0x80008000
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#define CONFIG_SYS_TEXT_BASE 0x80008000
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@ -303,7 +303,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*--------------------------------------------------------------------------*/
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/*--------------------------------------------------------------------------*/
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@ -252,7 +252,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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@ -221,7 +221,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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@ -191,7 +191,6 @@
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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/*
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@ -247,7 +247,6 @@
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/* Physical Memory Map */
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (128 << 20) /* at least 128 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/* NAND and environment organization */
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/* NAND and environment organization */
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