mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
- Fix SPI boot on ds414 (Ezra) - Fix PHY mode definition on armada-3720-uDPU (Jakov) - Convert CRS305-1G-4S to generic version (Luka)
This commit is contained in:
commit
ab80137cc4
16 changed files with 179 additions and 147 deletions
|
@ -125,14 +125,14 @@
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|||
ð0 {
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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phy-mode = "2500base-x";
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phy-mode = "sgmii-2500";
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managed = "in-band-status";
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phy = <ðphy0>;
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};
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ð1 {
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status = "okay";
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phy-mode = "2500base-x";
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phy-mode = "sgmii-2500";
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managed = "in-band-status";
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phy = <ðphy1>;
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};
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|
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@ -1,110 +1,17 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for CRS305-1G-4S board
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* Device Tree file for MikroTik CRS305-1G-4S+ board
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*
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* Copyright (C) 2016 Allied Telesis Labs
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*
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* Based on armada-xp-db.dts
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*
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* Note: this Device Tree assumes that the bootloader has remapped the
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* internal registers to 0xf1000000 (instead of the default
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* 0xd0000000). The 0xf1000000 is the default used by the recent,
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* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
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* boards were delivered with an older version of the bootloader that
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* left internal registers mapped at 0xd0000000. If you are in this
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* situation, you should either update your bootloader (preferred
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* solution) or the below Device Tree should be adjusted.
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* Copyright (C) 2020 Sartura Ltd.
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* Author: Luka Kovacic <luka.kovacic@sartura.hr>
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*/
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/dts-v1/;
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#include "armada-xp-98dx3236.dtsi"
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#include "armada-xp-crs305-1g-4s-u-boot.dtsi"
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#include "armada-xp-crs305-1g-4s.dtsi"
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/ {
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model = "CRS305-1G-4S";
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compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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aliases {
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spi0 = &spi0;
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};
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memory {
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device_type = "memory";
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reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
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};
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};
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&L2 {
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arm,parity-enable;
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marvell,ecc-enable;
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};
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&devbus_bootcs {
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status = "okay";
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/* Device Bus parameters are required */
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/* Read parameters */
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devbus,bus-width = <16>;
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devbus,turn-off-ps = <60000>;
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devbus,badr-skew-ps = <0>;
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devbus,acc-first-ps = <124000>;
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devbus,acc-next-ps = <248000>;
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devbus,rd-setup-ps = <0>;
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devbus,rd-hold-ps = <0>;
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/* Write parameters */
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devbus,sync-enable = <0>;
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devbus,wr-high-ps = <60000>;
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devbus,wr-low-ps = <60000>;
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devbus,ale-wr-ps = <60000>;
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <100000>;
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status = "okay";
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};
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&usb0 {
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status = "okay";
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model = "MikroTik CRS305-1G-4S+";
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <108000000>;
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m25p,fast-read;
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partition@u-boot {
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reg = <0x00000000 0x00100000>;
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label = "u-boot";
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};
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partition@u-boot-env {
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reg = <0x00100000 0x00040000>;
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label = "u-boot-env";
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};
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partition@unused {
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reg = <0x00140000 0x00ec0000>;
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label = "unused";
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};
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};
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};
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111
arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
Normal file
111
arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
Normal file
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@ -0,0 +1,111 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for CRS305-1G-4S board
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*
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* Copyright (C) 2016 Allied Telesis Labs
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* Copyright (C) 2020 Sartura Ltd.
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*
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* Based on armada-xp-db.dts
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*
|
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* Note: this Device Tree assumes that the bootloader has remapped the
|
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* internal registers to 0xf1000000 (instead of the default
|
||||
* 0xd0000000). The 0xf1000000 is the default used by the recent,
|
||||
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
|
||||
* boards were delivered with an older version of the bootloader that
|
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* left internal registers mapped at 0xd0000000. If you are in this
|
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* situation, you should either update your bootloader (preferred
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* solution) or the below Device Tree should be adjusted.
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*/
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/dts-v1/;
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#include "armada-xp-98dx3236.dtsi"
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#include "armada-xp-crs305-1g-4s-u-boot.dtsi"
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/ {
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model = "CRS305-1G-4S+";
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compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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aliases {
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spi0 = &spi0;
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};
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memory {
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device_type = "memory";
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reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
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};
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};
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&L2 {
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arm,parity-enable;
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marvell,ecc-enable;
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};
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&devbus_bootcs {
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status = "okay";
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/* Device Bus parameters are required */
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/* Read parameters */
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devbus,bus-width = <16>;
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devbus,turn-off-ps = <60000>;
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devbus,badr-skew-ps = <0>;
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devbus,acc-first-ps = <124000>;
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devbus,acc-next-ps = <248000>;
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devbus,rd-setup-ps = <0>;
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devbus,rd-hold-ps = <0>;
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/* Write parameters */
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devbus,sync-enable = <0>;
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devbus,wr-high-ps = <60000>;
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devbus,wr-low-ps = <60000>;
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devbus,ale-wr-ps = <60000>;
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <100000>;
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <108000000>;
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m25p,fast-read;
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partition@u-boot {
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reg = <0x00000000 0x00080000>;
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label = "u-boot";
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};
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partition@u-boot-env {
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reg = <0x00080000 0x00010000>;
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label = "u-boot-env";
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};
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partition@firmware {
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reg = <0x00090000 0x00f70000>;
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label = "firmware";
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};
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};
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||||
};
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9
arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi
Normal file
9
arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi
Normal file
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@ -0,0 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0+
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&spi0 {
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u-boot,dm-pre-reloc;
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spi-flash@0 {
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u-boot,dm-pre-reloc;
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};
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};
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@ -165,8 +165,8 @@ config TARGET_DB_XC3_24G4XG
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bool "Support DB-XC3-24G4XG"
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select 98DX3336
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config TARGET_CRS305_1G_4S
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bool "Support CRS305-1G-4S"
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config TARGET_CRS3XX_98DX3236
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bool "Support CRS3XX-98DX3236"
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select 98DX3236
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endchoice
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@ -188,7 +188,7 @@ config SYS_BOARD
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default "a38x" if TARGET_CONTROLCENTERDC
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default "x530" if TARGET_X530
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default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
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default "crs305-1g-4s" if TARGET_CRS305_1G_4S
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default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
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config SYS_CONFIG_NAME
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default "clearfog" if TARGET_CLEARFOG
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@ -207,7 +207,7 @@ config SYS_CONFIG_NAME
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default "controlcenterdc" if TARGET_CONTROLCENTERDC
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default "x530" if TARGET_X530
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default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
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default "crs305-1g-4s" if TARGET_CRS305_1G_4S
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default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
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|
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config SYS_VENDOR
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default "Marvell" if TARGET_DB_MV784MP_GP
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@ -225,7 +225,7 @@ config SYS_VENDOR
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default "CZ.NIC" if TARGET_TURRIS_MOX
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default "gdsys" if TARGET_CONTROLCENTERDC
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default "alliedtelesis" if TARGET_X530
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default "mikrotik" if TARGET_CRS305_1G_4S
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default "mikrotik" if TARGET_CRS3XX_98DX3236
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|
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config SYS_SOC
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default "mvebu"
|
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|
|
|
@ -1,7 +0,0 @@
|
|||
CRS305-1G-4S BOARD
|
||||
M: Luka Kovacic <me@lukakovacic.xyz>
|
||||
S: Maintained
|
||||
F: board/mikrotik/crs305-1g-4s/
|
||||
F: include/configs/crs305-1g-4s.h
|
||||
F: configs/crs305-1g-4s_defconfig
|
||||
F: arch/arm/dts/armada-xp-crs305-1g-4s.dts
|
11
board/mikrotik/crs3xx-98dx3236/MAINTAINERS
Normal file
11
board/mikrotik/crs3xx-98dx3236/MAINTAINERS
Normal file
|
@ -0,0 +1,11 @@
|
|||
CRS3XX-98DX3236 BOARD
|
||||
M: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
S: Maintained
|
||||
F: board/mikrotik/crs3xx-98dx3236/
|
||||
F: include/configs/crs3xx-98dx3236.h
|
||||
|
||||
CRS305-1G-4S BOARD
|
||||
M: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
S: Maintained
|
||||
F: configs/crs305-1g-4s_defconfig
|
||||
F: arch/arm/dts/armada-xp-crs305-1g-4s.dts
|
|
@ -2,7 +2,7 @@
|
|||
#
|
||||
# Copyright (C) 2015 Stefan Roese <sr@denx.de>
|
||||
|
||||
obj-y := crs305-1g-4s.o
|
||||
obj-y := crs3xx-98dx3236.o
|
||||
extra-y := kwbimage.cfg
|
||||
|
||||
quiet_cmd_sed = SED $@
|
|
@ -1,13 +1,13 @@
|
|||
MikroTik CRS305-1G-4S+IN
|
||||
MikroTik CRS3XX-98DX3236
|
||||
========================
|
||||
|
||||
CRS305-1G-4S+IN is a 4x SFP+ switch with a Gigabit Ethernet port for management.
|
||||
Specifications:
|
||||
CRS3XX-98DX3236 is a U-Boot port that supports a series of MikroTik switches
|
||||
based on the Marvell Prestera 98DX3236 switch with an integrated CPU.
|
||||
|
||||
Common specifications:
|
||||
- Marvell Prestera 98DX3236 switch with an integrated ARMv7 CPU
|
||||
- 512 MB DDR3 RAM
|
||||
- UART @ 115200bps
|
||||
- 4x SFP+
|
||||
- Gigabit Ethernet (AR8033)
|
||||
- 16 MB SPI flash (Winbond 25Q128JVSM)
|
||||
|
||||
Currently supported hardware:
|
||||
|
@ -15,7 +15,7 @@ Currently supported hardware:
|
|||
- SPI boot, environment and load kernel
|
||||
|
||||
Planned:
|
||||
- Gigabit Ethernet support
|
||||
- Gigabit Ethernet support (internal CPU <-> switch fabric connection)
|
||||
|
||||
Getting binary.0
|
||||
================
|
|
@ -9,4 +9,4 @@ VERSION 1
|
|||
BOOT_FROM spi
|
||||
|
||||
# Binary Header (bin_hdr) with DDR3 training code
|
||||
BINARY board/mikrotik/crs305-1g-4s/binary.0 0000005b 00000068
|
||||
BINARY board/mikrotik/crs3xx-98dx3236/binary.0 0000005b 00000068
|
|
@ -3,48 +3,46 @@ CONFIG_ARCH_CPU_INIT=y
|
|||
CONFIG_ARCH_MVEBU=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00800000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_TARGET_CRS305_1G_4S=y
|
||||
CONFIG_TARGET_CRS3XX_98DX3236=y
|
||||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_ENV_SECT_SIZE=0x40000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x80000
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
CONFIG_BUILD_TARGET="u-boot.kwb"
|
||||
CONFIG_USE_PREBOOT=y
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
|
||||
CONFIG_AUTOBOOT_STOP_STR="s"
|
||||
CONFIG_AUTOBOOT_KEYED_CTRLC=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_SYS_ALT_MEMTEST=y
|
||||
CONFIG_SYS_MEMTEST_START=0x00800000
|
||||
CONFIG_SYS_MEMTEST_END=0x00ffffff
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_I2C is not set
|
||||
CONFIG_CMD_SPI=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_CMD_UBI=y
|
||||
# CONFIG_CMD_UBI is not set
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s"
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_BLK=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MVTWSI=y
|
||||
# CONFIG_DM_I2C is not set
|
||||
# CONFIG_SYS_I2C_MVTWSI is not set
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_BAR=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_FIT_BEST_MATCH=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MVEBU=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
|
|
|
@ -3,8 +3,8 @@
|
|||
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
|
||||
*/
|
||||
|
||||
#ifndef _CONFIG_CRS305_1G_4S_H
|
||||
#define _CONFIG_CRS305_1G_4S_H
|
||||
#ifndef _CONFIG_CRS3XX_98DX3236_H
|
||||
#define _CONFIG_CRS3XX_98DX3236_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change)
|
||||
|
@ -32,4 +32,4 @@
|
|||
#undef CONFIG_SYS_MAXARGS
|
||||
#define CONFIG_SYS_MAXARGS 96
|
||||
|
||||
#endif /* _CONFIG_CRS305_1G_4S_H */
|
||||
#endif /* _CONFIG_CRS3XX_98DX3236_H */
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|
@ -87,7 +87,10 @@
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|||
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
|
||||
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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||||
|
||||
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
|
||||
/* SPL related SPI defines */
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||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#endif
|
||||
|
||||
/* DS414 bus width is 32bits */
|
||||
#define CONFIG_DDR_32BIT
|
||||
|
|
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Reference in a new issue