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net: Use 0.5 sec timeout in miiphy_reset() instead of counting loop

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This patch fixes a problem I've notived on a buggy PPC4xx system. This
system has problems with the PHY MDIO communication and seemed to be
stuck/crashed in miiphy_reset(). But degugging revealed, that the CPU
didn't crash, but "only" hung in this counting loop for about 2 minutes.

This patch now uses a real timeout of 0.5 seconds (as mentioned in the
comment in miiphy_reset).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This commit is contained in:
Stefan Roese 2010-02-02 13:43:48 +01:00 committed by Ben Warren
parent 4294b2485b
commit ab5a0dcb9c
1 changed files with 6 additions and 6 deletions
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12
common/miiphyutil.c
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@ -293,7 +293,7 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
int miiphy_reset (char *devname, unsigned char addr)
{
unsigned short reg;
int loop_cnt;
int timeout = 500;
if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
debug ("PHY status read failed\n");
@ -311,13 +311,13 @@ int miiphy_reset (char *devname, unsigned char addr)
* auto-clearing). This should happen within 0.5 seconds per the
* IEEE spec.
*/
loop_cnt = 0;
reg = 0x8000;
while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
debug ("PHY status read failed\n");
return (-1);
while (((reg & 0x8000) != 0) && timeout--) {
if (miiphy_read(devname, addr, PHY_BMCR, &reg) != 0) {
debug("PHY status read failed\n");
return -1;
}
udelay(1000);
}
if ((reg & 0x8000) == 0) {
return (0);